Artificial Intelligence (AI) is a big field, and this is a big book. We have tried to explore the full breadth of the field, which encompasses logic, probability, and continuous mathematics; perception, reasoning, learning, and action; and everything from microelectronic devices to robotic planetary explorers. The book is also big because we go into some depth. The subtitle of this book is “A Modern Approach.” The intended meaning of this rather empty phrase is that we have tried to synthesize what is now known into a common frame- work, rather than trying to explain each subfield of AI in its own historical context. We apologize to those whose subfields are, as a result, less recognizable.
標簽： A-Modern-Approach Intelligence
上傳時間： 2020-06-10
上傳用戶：shancjb
文件名稱 :acad2012doc.lsp (本站不提供任何文件的下載服務) 文件大小 :31014 byte 文件類型 :text/x-lisp MD5:7e569e7c307b745a422c3abe9bc553d9 SHA1:ec63898c82aa3e837745cec5f55831cdf1f9afe2
上傳時間： 2021-01-17
上傳用戶：
Multisim官方示例Multisim仿真例程基礎電路范例135例合集:Chapter 1 - RLC CircuitsChapter 2 - DiodesChapter 3 - TransistorsChapter 4 - AmplifiersChapter 5 - OpampsChapter 6 - FiltersChapter 7 - Miscellaneous CircuitsFundamental Circuits.pdf004 Parallel DC Circuits.ms10005 Series-Parrallel DC Circuit.ms10006 Current Analysis.ms10007 Millmans Theorem 1.ms10008 Millmans Theorem 2.ms10009 Kirchhoff's Current Law.ms10010 Thevenin's Theorem.ms10011 Superposition Principle.ms10012 Nortons Theorem and Source Conversion.ms10013 AC Voltage Measurement.ms10014 Frequency Response of the Series RL Network.ms10015 RL High and Low Pass Filter.ms10016 Frequency Response of the Series RC Network.ms10017 RC High and Low Pass Filter.ms10019 Center-Tapped Full-Wave Rectifier.ms10020 Bridge Rectifier.ms10021 Capacitor-Input Rectifier Filter.ms10022 Diode Clipper (Limiter).ms10023 Diode Clipper.ms10024 Diode Clamper (DC Restorer).ms10025 Diode Voltage Doubler.ms10026 Zener Diode and Voltage Regulation 1.ms10027 Zener Diode and Voltage Regulation 2.ms10028 Zener Diode and Voltage Regulation 3.ms10105 TTL Inverter.ms10107 TTL Gate.ms10109 OR Gate Circuit.ms10111 Over-Damp Circuit.ms10113 Critical-Damp Circuit.ms10115 Series RLC Circuit 1.ms10117 Clapp Oscillator.ms10119 Differential Amplifier 1.ms10121 Differential Amplifier in Common Mode.ms10123 LC Oscillator with Unity Gain Buffer.ms10125 Notch Filter.ms10127 PNP Differential Pair.ms10129 Crossover Network.ms10131 Second-Order High-Pass Chebyshev Filter.ms10133 Third-Order High-Pass Chebyshev Filter.ms10135 Fifth-Order High-Pass Filter.ms10
標簽： multisim
上傳時間： 2021-10-27
上傳用戶：trh505
基于TMS320F2812 光伏并網發電模擬裝置PROTEL設計原理圖+PCB+軟件源碼+WORD論文文檔,硬件采用2層板設計，PROTEL99SE 設計的工程文件，包括完整的原理圖和PCB文件，可以做為你的學習設計參考。 摘要：本文實現了一個基于TMS320F2812 DSP芯片的光伏并網發電模擬裝置，采用直流穩壓源和滑動變阻器來模擬光伏電池。通過TMS320F2812 DSP芯片ADC模塊實時采樣模擬電網電壓的正弦參考信號、光伏電池輸出電壓、負載電壓電流反饋信號等。經過數據處理后，用PWM模塊產生實時的SPWM 波，控制MOSFET逆變全橋輸出正弦波。本文用PI控制算法實現了輸出信號對給定模擬電網電壓的正弦參考信號的頻率和相位跟蹤，用恒定電壓法實現了光伏電池最大功率點跟蹤（MPPT），從而達到模擬并網的效果。另外本裝置還實現了光伏電池輸出欠壓、負載過流保護功能以及光伏電池輸出欠壓、過流保護自恢復功能、聲光報警功能、孤島效應的檢測、保護與自恢復功能。系統測試結果表明本設計完全滿定設計要求。關鍵詞：光伏并網，MPPT，DSP Photovoltaic Grid-connected generation simulator Zhangyuxin，Tantiancheng，Xiewuyang(College of Electrical Engineering, Chongqing University)Abstract: This paper presents a photovoltaic grid-connected generation simulator which is based on TMS320F2812 DSP, with a DC voltage source and a variable resistor to simulate the characteristic of photovoltaic cells. We use the internal AD converter to real-time sampling the referenced grid voltage signal, outputting voltage of photovoltaic, feedback outputting voltage and current signal. The PWM module generates SVPWM according to the calculation of the real-time sampling data, to control the full MOSFET inverter bridge output sine wave. We realized that the output voltage of the simulator can track the frequency and phase of the referenced grid voltage with PI regulation, and the maximum photovoltaic power tracking with constant voltage regulation, thereby achieved the purpose of grid-connected simulation. Additionally, this device has the over-voltage and over-current protection, audible and visual alarm, islanding detecting and protection, and it can recover automatically. The testing shows that our design is feasible.Keywords: Photovoltaic Grid-connected，MPPT，DSP 目錄引言 11. 方案論證 11.1. 總體介紹 11.2. 光伏電池模擬裝置 11.3. DC-AC逆變橋 11.4. MOSFET驅動電路方案 21.5. 逆變電路的變頻控制方案 22. 理論分析與計算 22.1. SPWM產生 22.1.1. 規則采樣法 22.1.2. SPWM 脈沖的計算公式 32.1.3. SPWM 脈沖計算公式中的參數計算 32.1.4. TMS320F2812 DSP控制器的事件管理單元 42.1.5. 軟件設計方法 62.2. MPPT的控制方法與參數計算 72.3. 同頻、同相的控制方法和參數計算 8
標簽： tms320f2812 光伏 并網發電 模擬 protel pcb
上傳時間： 2021-11-02
上傳用戶：
This paper presents a new type of electromagnetic damper with rotating inertial mass that has been devel oped to control the vibrations of structures subjected to earthquakes. The electromagnetic inertial mass damper (EIMD) consists of a ball screw that converts axial oscillation of the rod end into rotational motion of the internal flflywheel and an electric generator that is turned by the rotation of the inner rod. The EIMD is able to generate a large inertial force created by the rotating flflywheel and a variable damping force devel oped by the electric generator. Device performance tests of reduced-scale and full-scale EIMDs were under taken to verify the basic characteristics of the damper and the validity of the derived theoretical formulae. Shaking table tests of a three-story structure with EIMDs and earthquake response analyses of a building with EIMDs were conducted to demonstrate the seismic response control performance of the EIMD. The EIMD is able to reduce story drifts as well as accelerations and surpasses conventional types of dampers in reducing acceleration responses.
標簽： electromagnetic response Seismic control using
上傳時間： 2021-11-04
上傳用戶：a1293065
This programming manual provides information for application and system-level softwaredevelopers. It gives a full description of the STM32F3 and STM32F4 Series Cortex?-M4processor programming model, instruction set and core peripherals.
標簽： stm32f7
上傳時間： 2021-12-02
上傳用戶：
Multisim仿真Multisim數電模電仿真實例源碼100例,08數控本二 07.ms1010-10-4串聯型直流穩壓電路(2).ms724小時時鐘（full）改.ms104位數字頻率計.ms10559.ms10ADC電壓顯示1.ms12BIN2BCD電路.ms10FM解調.ms14FM解調.ms14 (Security copy)LED調光電路.pdsprjLM324簡-易-電-子-琴-.ms10MC1496應用2.ms10Multisim 13.0仿真OP07CP兩級放大.rarMUltisim 仿真作品集.zipOCL功率放大器電路.ms12OP07CP兩級差動放大.ms13TL494 5V DC-DC.ms14UC3843升壓控制電路.ms14UC3843芯片的DC-DC升壓電路.ms14XUNKE936防靜電焊臺電路圖.ms12zhongji電路.ms10三極管單按鈕開關電路.ms10三極管線性穩壓電路.ms10三相電源錯相、斷相保護電路.ms10乘法器.ms14交流電源防盜報警器.ms14交通信號燈_X.ms12交通燈（74LS163、74LS153、74LS74）.ms13倒計時定時器 (1).ms10倒計時定時器.ms10倒計時定時器A【74LS161 74LS192】.ms10六路20秒聲光顯示計分搶答器.ms14減法.ms12四種波形發生器-741.ms14四路20秒聲光顯示計分搶答器.ms14四路帶計分系統搶答器.rar四路流水燈.ms10四階帶通濾波.ms14四階帶通濾波.ms14 (Security copy)多色流水燈.ms10字發生+共陽數碼管顯示電路.ms10小信號放大電路.ms10差分比例電路+比例放大.ms14搶答器 (1).ms10搶答器.ms10數字時鐘設計2.ms12數字電子鐘仿真電路圖.ms10數字電子鐘仿真電路圖2X.ms10數字鐘X.ms10數字頻率計(帶量程).ms14數字頻率計.ms10李薩如圖.ms10模擬打兵乓球電路.ms10汽車尾燈控制電路2.ms10汽車尾燈顯示控制電路.ms10汽車指示燈設計孫昱.docx混沌電路.ms10火災報警.jpg電容測量電路.ms10電機正反轉接觸器應用.ms12電路2.ms10電路3.ms10電風扇.ms10簡易洗衣機.ms10簡易洗衣機2.ms10簡易洗衣機2當.ms14籃球30秒計時器_X.ms13設計1.ms14設計2.ms14設計2.ms14 (Security copy)設計201405292100八路搶答器.ms10設計201405301500骰子模擬電路.ms10設計201406252300多色流水燈.ms10設計21.ms14設計3.ms14設計3.ms14 (Security copy)路燈節能控制.ms10輸出電壓可調的穩壓源.ms14輸出電壓可調的穩壓源.ms14 (Security copy)鎖相環.ms7音量控制電路.ms10音頻IRF610耳放.ms13音頻功率放大器.ms14
標簽： multisim
上傳時間： 2021-12-12
上傳用戶：
This texts contemporary approach focuses on the concepts of linear control systems, rather than computational mechanics. Straightforward coverage includes an integrated treatment of both classical and modern control system methods. The text emphasizes design with discussions of problem formulation, design criteria, physical constraints, several design methods, and implementation of compensators.Discussions of topics not found in other texts--such as pole placement, model matching and robust tracking--add to the texts cutting-edge presentation. Students will appreciate the applications and discussions of practical aspects, including the leading problem in developing block diagrams, noise, disturbances, and plant perturbations. State feedback and state estimators are designed using state variable equations and transfer functions, offering a comparison of the two approaches. The incorporation of MATLAB throughout the text helps students to avoid time-consuming computation and concentrate on control system design and analysis
標簽： 控制系統
上傳時間： 2021-12-15
上傳用戶：
This Section covers the design of power transformers used in buck-derived topologies: forward converter, bridge, half-bridge, and full-wave centertap. Flyback transformers (actually coupled inductors) are covered in a later Section. For more specialized applications, the principles discussed herein will generally apply.
上傳時間： 2021-12-16
上傳用戶：fliang
FPGA片內FIFO讀寫測試Verilog邏輯源碼Quartus工程文件+文檔說明，使用 FPGA 內部的 FIFO 以及程序對該 FIFO 的數據讀寫操作。FPGA型號Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。timescale 1ns / 1ps//////////////////////////////////////////////////////////////////////////////////module fifo_test( input clk, //50MHz時鐘 input rst_n //復位信號，低電平有效 );//-----------------------------------------------------------localparam W_IDLE = 1;localparam W_FIFO = 2; localparam R_IDLE = 1;localparam R_FIFO = 2; reg[2:0] write_state;reg[2:0] next_write_state;reg[2:0] read_state;reg[2:0] next_read_state;reg[15:0] w_data; //FIFO寫數據wire wr_en; //FIFO寫使能wire rd_en; //FIFO讀使能wire[15:0] r_data; //FIFO讀數據wire full; //FIFO滿信號 wire empty; //FIFO空信號 wire[8:0] rd_data_count; wire[8:0] wr_data_count; ///產生FIFO寫入的數據always@(posedge clk or negedge rst_n)begin if(rst_n == 1'b0) write_state <= W_IDLE; else write_state <= next_write_state;endalways@(*)begin case(write_state) W_IDLE: if(empty == 1'b1) //FIFO空， 開始寫FIFO next_write_state <= W_FIFO; else next_write_state <= W_IDLE; W_FIFO: if(full == 1'b1) //FIFO滿 next_write_state <= W_IDLE; else next_write_state <= W_FIFO; default: next_write_state <= W_IDLE; endcaseendassign wr_en = (next_write_state == W_FIFO) ? 1'b1 : 1'b0; always@(posedge clk or negedge rst_n)begin if(rst_n == 1'b0) w_data <= 16'd0; else if (wr_en == 1'b1) w_data <= w_data + 1'b1; else w_data <= 16'd0; end///產生FIFO讀的數據always@(posedge clk or negedge rst_n)begin if(rst_n == 1'b0) read_state <= R_IDLE; else read_state <= next_read_state;endalways@(*)begin case(read_state) R_IDLE: if(full == 1'b1) //FIFO滿, 開始讀FIFO next_read_state <= R_FIFO; else next_read_state <= R_IDLE; R_FIFO: if(empty == 1'b1)
上傳時間： 2021-12-19
上傳用戶：20125101110
