This is the source for a C compiler that generates 386 or
m68K code. Code generation is fairly good although the optimizer is
a little naive... the code itself should be highly portable although
there are some issues involved with porting from MSDOS that have to
be resolved for example the size of LONG on unix machines is so big
some of the code generated gets messed up.
Code generation requires TASM to assemble the compiler output
you can use the borland TLINK to produce executables, or the
Watcom WLINK can also be used. PMODE systems written by TRAN are used
for the DPMI interface.
This the first release (version 0.0) of the Peersim
high level P2P network simulator.
This archive contains the javadoc generated documentation,
and a java archive containing the simulator source and bytecode
and some examples.
實現8比特字節的RS糾錯編碼，可以指定極性校驗字節數目，能產生的最大校驗序列長度為255字節（含極性校驗字節）.This is an implementation of a Reed-Solomon code with 8 bit bytes, and a configurable number of parity bytes. The maximum sequence length (codeword) that can be generated is 255 bytes, including parity bytes.
This the source for a C compiler that generates 386 or
m68K code. Code generation is fairly good although the optimizer is
a little naive... the code itself should be highly portable although
there are some issues involved with porting from MSDOS that have to
be resolved for example the size of LONG on unix machines is so big
some of the code generated gets messed up.
Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3. Output pins: OUT [15:0].
4. Input signals generated from test pattern are latched in one cycle and are
synchronized at clock rising edge.
5. The SHIFT signal describes the shift number. The shift range is 0 to 15.
6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it
shifts input data to left.
7. When the signal SIGN is high, the input data is a signed number and it shifts with
sign extension. However, the input data is an unsigned number if the signal SIGN
is low.
8. You can only use following gates in Table I and need to include the delay
information (Tplh, Tphl) in your design.
Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3. Output pins: OUT [15:0].
4. Input signals generated from test pattern are latched in one cycle and are
synchronized at clock rising edge.
5. The SHIFT signal describes the shift number. The shift range is 0 to 15.
6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it
shifts input data to left.
7. When the signal SIGN is high, the input data is a signed number and it shifts with
sign extension. However, the input data is an unsigned number if the signal SIGN
is low.
8. You can only use following gates in Table I and need to include the delay
information (Tplh, Tphl) in your design.
The inverse of the gradient function. I ve provided versions that work on 1-d vectors, or 2-d or 3-d arrays. In the 1-d case I offer 5 different methods, from cumtrapz, and an integrated cubic spline, plus several finite difference methods.
In higher dimensions, only a finite difference/linear algebra solution is provided, but it is fully vectorized and fully sparse in its approach. In 2-d and 3-d, if the gradients are inconsistent, then a least squares solution is generated
ST32
基于（英蓓特）STM32V100的EXTI程序
This example shows how to configure an external interrupt line.
In this example, the EXTI line 9 is configured to generate an interrupt on each
falling edge. In the interrupt routine a led connected to PC.06 is toggled.
This led will be toggled due to the softawre interrupt generated on EXTI Line9
then at each falling edge.
We propose a technique that allows a person to design a new photograph
with substantially less effort. This paper presents a method that generates a composite image when a user types
in nouns, such as “boat” and “sand.” The artist can optionally design an intended image by specifying other
constraints. Our algorithm formulates the constraints as queries to search an automatically annotated image
database. The desired photograph, not a collage, is then synthesized using graph-cut optimization, optionally
allowing for further user interaction to edit or choose among alternative generated photos. An implementation of
our approach, shown in the associated video, demonstrates our contributions of (1) a method for creating specific
images with minimal human effort, and (2) a combined algorithm for automatically building an image library with
semantic annotations from any photo collection.
The DHRY program performs the dhrystone benchmarks on the 8051.
Dhrystone is a general-performance benchmark test originally
developed by Reinhold Weicker in 1984. This benchmark is
used to measure and compare the performance of different
computers or, in this case, the efficiency of the code
generated for the same computer by different compilers.
The test reports general performance in dhrystones per second.
Like most benchmark programs, dhrystone consists of standard
code and concentrates on string handling. It uses no
floating-point operations. It is heavily influenced by
hardware and software design, compiler and linker options,
code optimizing, cache memory, wait states, and integer
data types.
The DHRY program is available in different targets:
Simulator: Large Model: DHRY example in LARGE model
for Simulation
Philips 80C51MX: DHRY example in LARGE model
for the Philips 80C51MC
