MICROCHIP 實現I2C的 Master 端 (Firmware) 及 Slave 端 (hardware) 相對應的程式範例
標簽： MICROCHIP Firmware hardware Master
上傳時間： 2014-01-08
上傳用戶：yimoney
獲得當前連接到電腦的USB設備的詳細信息 Device Description hardware Id Compatible Ids Service Class ClassGuid Driver Manufacturer Enumerator
標簽： Description Compatible ClassGuid hardware
上傳時間： 2016-12-03
上傳用戶：cjl42111
TMS320VC5509A hardware Designer’s Resource Guide
標簽： hardware Designer Resource 5509A
上傳時間： 2016-12-08
上傳用戶：yyq123456789
M6117D hardware Reference
上傳時間： 2014-01-23
上傳用戶：yuanyuan123
hardware Design SIM300CZ_HD_V1.01
標簽： hardware CZ_HD_V Design 1.01
上傳時間： 2016-12-16
上傳用戶：BIBI
The Linux GPIB Package is a support package for GPIB (IEEE 488) hardware. The package contains kernel driver modules, and a C user-space library with Guile, Perl, PHP, Python and TCL bindings. The API of the C library is intended to be compatible with National Instrument s GPIB library. The Linux GPIB Package is licensed under the GNU General Public License . Requirements: Linux kernel version 2.4.x (use Linux-GPIB version 3.1.x). Earlier kernel versions are not supported.
上傳時間： 2016-12-17
上傳用戶：cccole0605
改進的hardware檢測代碼，配合我上傳的DESCryptD9.pas是實現軟件注冊功能的基礎。
上傳時間： 2013-11-26
上傳用戶：netwolf
The Cyclone® III PCI development board provides a hardware platform for developing and prototyping low-power, high-performance, logic-intensive PCI-based designs. The board provides a high-density of the memory to facilitate the design and development of FPGA designs which need huge memory storage, and also includes Low-Voltage Differential Signaling (LVDS) interface of the High-Speed Terasic Connectors (HSTCs) for extra high-speed interface application.
標簽： development developing prototypi provides
上傳時間： 2017-01-29
上傳用戶：jjj0202
s3c6400 video code,you play video smooth with it,it is hardware codec
標簽： video hardware s3c6400 smooth
上傳時間： 2017-02-03
上傳用戶：kristycreasy
What is Verilog? ➥ Verilog HDL is a hardware Description Language (HDL) ➥ Verilog HDL allows describe designs at a high level of abstraction as well as the lower implementation levels ➥ Primary use of HDLs is the simulation of designs ➥ Verilog is a discrete event time simulator What is VeriWell? ➥ VeriWell is a comprehensive implementation of Verilog HDL
標簽： Verilog HDL 10149 Description
上傳時間： 2017-02-18
上傳用戶：
