hardware Information in Linux Networking in Java
標(biāo)簽： Information Networking hardware Linux
上傳時間： 2013-12-16
上傳用戶：黃華強(qiáng)
Tigerjet hardware SDK USB adapter
標(biāo)簽： Tigerjet hardware adapter SDK
上傳時間： 2013-12-24
上傳用戶：koulian
hardware PCB Pads-HotKey-Editor
標(biāo)簽： Pads-HotKey-Editor hardware PCB
上傳時間： 2014-12-22
上傳用戶：aeiouetla
Designing Embedded hardware Ebook By John Catsoulis If you want to build your own embedded system, or tweak an existing one, this invaluable book gives you the understanding and practical skills you need.
標(biāo)簽： Designing Catsoulis Embedded hardware
上傳時間： 2014-01-18
上傳用戶：cazjing
I2C core code in hardware descrption language so as enable a cpld/fpga to be programmed for specific customized applications of our requirment & make the pcb work to meet the application requirements.
標(biāo)簽： descrption programmed hardware language
上傳時間： 2014-12-20
上傳用戶：許小華
This project features a complete JPEG hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288). Image resolution is not limited. It takes an RGB input (row-wise) and outputs to a memory the compressed JPEG image. Its quality is comparable to software solutions.
標(biāo)簽： Compressor hardware Baseline features
上傳時間： 2017-04-21
上傳用戶：wyc199288
This is a simple MIPS processor datapath written in VERILOG hardware language. You can see the signals when emulating in signalscan. Compile it with verilog in linux.
標(biāo)簽： processor datapath hardware language
上傳時間： 2017-04-22
上傳用戶：磊子226
SIM300DZ is the hardware Description of Version 2.04 of the SIMCARD GSM Module. This datasheet corrects some problems that others have.
標(biāo)簽： Description datasheet the hardware
上傳時間： 2017-04-23
上傳用戶：wangchong
The use of hardware description languages (HDLs) is becoming increasingly common for designing and verifying FPGA designs. Behavior level description not only increases design productivity, but also provides unique advantages for design verification. The most dominant HDLs today are Verilog and VHDL. This application note illustrates the use of Verilog in the design and verification of a digital UART (Universal Asynchronous Receiver & Transmitter).
標(biāo)簽： increasingly description designing languages
上傳時間： 2014-01-08
上傳用戶：小草123
I CAME BACK I BRING LOTS OF THING TO U ALL THIS TUTORIAL FOR DAY3 SESSION SERIES OF UNIX hardware AND NETWORKING CONCEPTS
標(biāo)簽： hardware TUTORIAL SESSION SERIES
上傳時間： 2017-04-26
上傳用戶：liglechongchong
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