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high-level

A few short years ago, the applications for video were somewhat confined—analog was used for broad

A few short years ago, the applications for video were somewhat confined—analog was used for broadcast and cable television, VCRs, set-top boxes, televisions and camcorders. Since then, there has been a tremendous and rapid conversion to digital video, mostly based on the MPEG-2 video compression standard. Today, in addition to the legacy DV, MPEG-1 and MPEG-2 audio and video com- pression standards, there are three new high- performance video compression standards. These new video codecs offer much higher video compression for a given level of video quality.

標(biāo)簽： applications for confined somewhat

上傳時(shí)間： 2016-10-29

上傳用戶：bjgaofei
iic總線控制器VHDL實(shí)現(xiàn) -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control

iic總線控制器VHDL實(shí)現(xiàn) -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control function for the I2C master/slave shift.vhd -- shift register uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC upcnt4.vhd -- 4-bit up counter i2c_timesim.vhd -- post-route I2C simulation netlist

標(biāo)簽： VHDL c_control vhd control

上傳時(shí)間： 2016-10-30

上傳用戶：woshiayin
gps design guide,for low level study

gps design guide,for low level study

標(biāo)簽： design guide level study

上傳時(shí)間： 2016-10-30

上傳用戶：liglechongchong
low level hook to record mouse and keyobard events and play back

low level hook to record mouse and keyobard events and play back

標(biāo)簽： and keyobard events record

上傳時(shí)間： 2016-11-15

上傳用戶：天涯
High-quality C + + programming guide 高質(zhì)量C++編程指南

High-quality C + + programming guide 高質(zhì)量C++編程指南

標(biāo)簽： High-quality programming guide 高質(zhì)量

上傳時(shí)間： 2013-12-24

上傳用戶：xlcky
Log Shifter Gate Level Design using Verilog(IC design Lab) and Lab Note

Log Shifter Gate Level Design using Verilog(IC design Lab) and Lab Note

標(biāo)簽： Lab Shifter Verilog Design

上傳時(shí)間： 2016-12-01

上傳用戶：cylnpy
A high-speed variable phase accumulator for an ADPLL architecture

A high-speed variable phase accumulator for an ADPLL architecture

標(biāo)簽： architecture accumulator high-speed variable

上傳時(shí)間： 2013-11-26

上傳用戶：wpt
Newnes.Digital.Signal.Processing.System.Level.Design.Using.LabVIEW.Jun.2005.eBook-DDU labview信號處理

Newnes.Digital.Signal.Processing.System.Level.Design.Using.LabVIEW.Jun.2005.eBook-DDU labview信號處理教材。

標(biāo)簽： Processing eBook-DDU Digital LabVIEW

上傳時(shí)間： 2014-01-22

上傳用戶：gundan
High Performance MySQL SECOND EDITION 一本英文原版的Mysql數(shù)據(jù)庫優(yōu)化性能的書籍

High Performance MySQL SECOND EDITION 一本英文原版的Mysql數(shù)據(jù)庫優(yōu)化性能的書籍，PDF第二版的，很清晰，非常不錯(cuò)！

標(biāo)簽： Performance EDITION SECOND MySQL

上傳時(shí)間： 2016-12-07

上傳用戶：金宜
The TMS320LF240xA and TMS320LC240xA devices, new members of the TMS320C24x generation of dig

The TMS320LF240xA and TMS320LC240xA devices, new members of the TMS320C24x generation of digital signal processor (DSP) controllers, are part of the TMS320C2000 platform of fixed-point DSPs. The 240xA devices offer the enhanced TMS320 DSP architectural design of the C2xx core CPU for low-cost, low-power, and high-performance processing capabilities. Several advanced peripherals, optimized for digital motor and motion control applications, have been integrated to provide a true single-chip DSP controller. While code-compatible with the existing C24x DSP controller devices, the 240xA offers increased processing performance (40 MIPS) and a higher level of peripheral integration. See the TMS320x240xA Device Summary section for device-specific features.

標(biāo)簽： TMS 320 generation 240

上傳時(shí)間： 2013-12-16

上傳用戶：GavinNeko