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  • lpc2478完全使用手冊

    NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.

    標簽: 2478 lpc 使用手冊

    上傳時間: 2013-11-15

    上傳用戶:zouxinwang

  • LLCR Pin Socket Testing with t

    LLCR Pin Socket Testing with the Model 3732 High Density Matrix Card Computer processors (CPUs) today have come a long way from the computer processors of the past. They draw more power, run at lower voltages, and have more pins than ever before.

    標簽: Testing Socket LLCR with

    上傳時間: 2013-10-24

    上傳用戶:whenfly

  • dsPIC30F產品手冊

    dsPIC30F產品手冊 High Performance Digital Signal Controllers This section of the manual contains the following topics:1.1 Introduction 1.2 Manual Objective 1.3 Device Structure1.4 Development Support  1.5 Style and Symbol Conventions 1.6 Related Documents 1.7 Revision History

    標簽: dsPIC 30F 30 產品手冊

    上傳時間: 2013-12-26

    上傳用戶:xzt

  • LPC1769 LPC1768 LPC1767 LPC176

    The LPC1769/68/67/66/65/64 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration.

    標簽: LPC 1769 1768 1767

    上傳時間: 2014-02-20

    上傳用戶:13215175592

  • CAT823 CAT824 CAT825 帶看門狗和手動復位

    The CAT823, CAT824, and CAT825 provide basic reset and monitoring functions for the electronic systems. Each device monitors the system voltage and maintains a reset output until that voltage reaches the device’s specified trip value and then maintains the reset output active condition until the device’s internal timer, after a minimum timer of 140ms; toallow the systems power supply to stabilize.

    標簽: CAT 823 824 825

    上傳時間: 2014-11-18

    上傳用戶:BOBOniu

  • MC9S08QG8英文資料 pdf

    MC9S08QG8英文資料 The MC9S08QG8 is the newest member of the Freescale 8-bit family of highly integratedmicrocontrollers, based on the high-performance yet low power HCS08 core. The MC9S08QG8is an excellent solution for power-sensitive applications with extended battery life and maximum performance down to 1.8VDC.

    標簽: MC9 S08 QG8

    上傳時間: 2014-12-28

    上傳用戶:dxxx

  • FREESCALE單片機的C編程教程

     1.The C Programming Language is a powerful, flexible andpotentially portable high-level programming language. 2.The C language may be used successfully to create a programfor an 8-bit MCU, but to produce the most efficient machinecode, the programmer must carefully construct the C Languageprogram.3.The programmer must not only create an efficient high leveldesign, but also pay attention to the detailed implementation.

    標簽: FREESCALE 單片機 編程 教程

    上傳時間: 2013-12-27

    上傳用戶:huanglang

  • 開放式匯編器系統的設計

    匯編器在微處理器的驗證和應用中舉足輕重,如何設計通用的匯編器一直是研究的熱點之一。本文提出了一種開放式的匯編器系統設計思想,在匯編語言與機器語言間插入中間代碼CMDL(code mapping description language)語言,打破匯編語言與機器語言的直接映射關系,由此建立起一套描述匯編語言與機器語言的開放式映射體系。基于此開放式映射體系開發了一套匯編器系統,具有較高層次上的通用性和可移植性。【關鍵詞】指令集,CMDL,匯編器,開放式 Design of Retargetable Assembler System Liu Ling Feng Wen Nan Wang Ying Chun Jiang An Ping Ji Li Jiu IME of Peking University, 100871【摘要】An assembler plays a very important role in the field of microprocessor verifications and applications, thus how to build a retargetable assembler system has been a hotspot in this field for long time. This paper presents a new method about the retargetable assembler system design.It provides a kind of language CMDL, code mapping description language. During the process of assembling, assembler languages are firstly translated to CMDL, and then mapped to the machine codes. In an other word, CMDL is inserted between assembler languages and machine codes during the translation procedure. As a medium code, CMDL has a lot of features, such as high extraction, strong descript capabilities. It can describe almost all attributes of assembler languages. By breaking the direct mapping relationship between assembler languages and machine codes, the complexities of machine codes are hided to the users, therefore, the new retargetable assembler system has higher retargetable level by converting the mapping from assembler languages and machine codes to assembler languages and CMDL, and implementationof it becomes easier. Based on the new mapping system structure, a retargetable assemblersystem is developed. It proved the whole system has good retargetability and implantability.【關鍵詞】instruction set, symbol table, assembler, lexical analysis, retargetability

    標簽: 開放式 匯編器

    上傳時間: 2013-10-10

    上傳用戶:meiguiweishi

  • PCA82C250 PCA82C251 CAN Transc

    The PCA82C250 and PCA82C251 are advanced transceiver products for use in automotive and general industrialapplications with transfer rates up to 1 Mbit/s. They support the differential bus signal representation beingdescribed in the international standard for in-vehicle CAN high-speed applications (ISO 11898). Controller AreaNetwork (CAN) is a serial bus protocol being primarily intended for transmission of control related data between anumber of bus nodes.

    標簽: PCA 82C Transc 82

    上傳時間: 2013-11-24

    上傳用戶:Alick

  • PCA9517 Level translating I2C-

    The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Usingthe PCA9517 enables the system designer to isolate two halves of a bus for both voltageand capacitance. The SDA and SCL pins are over voltage tolerant and arehigh-impedance when the PCA9517 is unpowered.

    標簽: translating Level 9517 PCA

    上傳時間: 2013-12-25

    上傳用戶:wsf950131

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