This release supports Microsoft Windows NT 4.0, Windows 2000, Windows 95, Windows 98, Windows Me, Windows XP, Red Hat Linux 6.1, Red Hat Linux 7.2, Solaris 2.6, 2.7 (7.0), 8.0, HP-UX 10.20, and 11 (see important note below)." multice22.rar
上傳時(shí)間： 2013-05-29
上傳用戶：hustfanenze
One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assignments should be used. This paper details how Verilog blocking andnonblocking assignments are scheduled, gives important coding guidelines to infer correctsynthesizable logic and details coding styles to avoid Verilog simulation race conditions
上傳時(shí)間： 2013-10-17
上傳用戶：tb_6877751
The reference voltage, supply voltages, and ground are also important. Section 4 of this book willaddress the issues associated with grounding and decoupling, and this section discusses the ones listedabove.
標(biāo)簽： 數(shù)據(jù)轉(zhuǎn)換器 接口
上傳時(shí)間： 2014-12-23
上傳用戶：xiaohuanhuan
The trend in ADCs and DACs is toward higher speeds and higher resolutions atreduced power levels. Modern data converters generally operate on ±5V (dualsupply) or +5V (single supply). In fact, many new converters operate on a single +3Vsupply. This trend has created a number of design and applications problems whichwere much less important in earlier data converters, where ±15V supplies and ±10Vinput ranges were the standard.
標(biāo)簽： ADC 信號調(diào)節(jié) 傳感器
上傳時(shí)間： 2013-11-16
上傳用戶：sjw920325
Abstract: Perfection is relative and application specific. The perfect race car is not the car we use to commute to work. We need products for everyday use that are high quality, affordable, and solidly reliable. There will be times when we must use components that are not perfect, and this is when calibration becomes important. Calibration techniques reduce tolerances in imperfect manufacturing equipment while maintaining affordability.
標(biāo)簽： 校準(zhǔn)
上傳時(shí)間： 2013-10-09
上傳用戶：哈哈hah
Many applications require a clock signal to be synchronous, phase-locked, or derived fromanother signal, such as a data signal or another clock. This type of clock circuit is important in
標(biāo)簽： XAPP DPLL 854 數(shù)字鎖相環(huán)
上傳時(shí)間： 2014-12-23
上傳用戶：qq21508895
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
標(biāo)簽： pci PCB 設(shè)計(jì)規(guī)范
上傳時(shí)間： 2013-10-15
上傳用戶：busterman
Abstract: It is critically important that lithium-ion battery stacks have a good battery-management system for monitoring many cellvoltages and cell temperatures. Without that monitoring, thermal runaway can lead to a battery explosion. This design idea presentsa low-power circuit that measures the temperature of up to 12 thermistors. It powers and configures the multiplexers, and also putsthe muxes into shutdown to save power when not measuring temperatures.
標(biāo)簽： 電池管理系統(tǒng) 多點(diǎn) 溫度測量 方案
上傳時(shí)間： 2013-10-29
上傳用戶：xwd2010
Smart Batteries are an increasingly popular choice formore than just traditional compact consumer electronicdevices. For example, Smart Batteries are being used asbattery backup for products such as blade servers, whereknowing battery status is very important
標(biāo)簽： 智能電池 充電器 備用電池 服務(wù)器
上傳時(shí)間： 2013-11-02
上傳用戶：wangzhen1990
Alkaline batteries are convenient because they’re easy tofi nd and relatively inexpensive, making them the powersource of choice for portable instruments and devicesused for outdoor recreation. Their long shelf life alsomakes them an excellent choice for emergency equipmentthat may see infrequent use but must be ready to go on amoment’s notice. It is important that the DC/DC convertersin portable devices operate over the widest possiblebattery voltage range to extend battery run time, and thussave the user from frequent battery replacement.
標(biāo)簽： 428 DN 同步升壓 轉(zhuǎn)換器
上傳時(shí)間： 2014-12-24
上傳用戶：569342831
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