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  • Rf And Microwave Power Amplifier Design(2005)

    The main objective of this book is to present all the relevant informationrequired for RF and micro-wave power amplifier design includingwell-known and novel theoretical approaches and practical design techniquesas well as to suggest optimum design approaches effectively combininganalytical calculations and computer-aided design. This bookcan also be very useful for lecturing to promote the analytical way ofthinking with practical verification by making a bridge between theoryand practice of RF and microwave engineering. As it often happens, anew result is the well-forgotten old one. Therefore, the demonstrationof not only new results based on new technologies or circuit schematicsis given, but some sufficiently old ideas or approaches are also introduced,that could be very useful in modern practice or could contributeto appearance of new ideas or schematic techniques.

    標簽: Amplifier Microwave Design Power

    上傳時間: 2013-12-22

    上傳用戶:vodssv

  • CF卡技術資料

    The information in this specification is subject to change without notice.Use of this specification for product design requires an executed license agreement from the CompactFlashAssociation.The CompactFlash Association shall not be liable for technical or editorial errors or omissions contained herein; norfor incidental or consequential damages resulting from the furnishing, performance, or use of this material.All parts of the CompactFlash Specification are protected by copyright law and all rights are reserved. Thisdocumentation may not, in whole or in part, be copied, photocopied, reproduced, translated, or reduced to anyelectronic medium or machine readable form without prior consent, in writing, from the CompactFlash Association.The CFA logo is a trademark of the CompactFlash Association.Product names mentioned herein are for identification purposes only and may be trademarks and/or registeredtrademarks of their respective companies.© 1998-99, CompactFlash Association. All rights reserved.

    標簽: 技術資料

    上傳時間: 2013-10-08

    上傳用戶:stewart·

  • PCB設計軟件ExpressPCB 下載

    ExpressPCB 是一款免費的PCB設計軟件,簡單實使??梢援嬰p層板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional.   Our board manufacturing service makes top quality two and four layer PCBs. Use our MiniBoard service and pay only $51 for three boards (plus $8 shipping).

    標簽: ExpressPCB PCB 設計軟件

    上傳時間: 2013-11-15

    上傳用戶:lchjng

  • PCB設計軟件ExpressPCB 下載

    ExpressPCB 是一款免費的PCB設計軟件,簡單實使。可以畫雙層板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional.   Our board manufacturing service makes top quality two and four layer PCBs. Use our MiniBoard service and pay only $51 for three boards (plus $8 shipping).

    標簽: ExpressPCB PCB 設計軟件

    上傳時間: 2013-10-09

    上傳用戶:1047385479

  • HDL的可綜合設計簡介

    本文簡單探討了verilog HDL設計中的可綜合性問題,適合HDL初學者閱讀     用組合邏輯實現(xiàn)的電路和用時序邏輯實現(xiàn)的   電路要分配到不同的進程中。   不要使用枚舉類型的屬性。   Integer應加范圍限制。    通常的可綜合代碼應該是同步設計。   避免門級描述,除非在關鍵路徑中。

    標簽: HDL 綜合設計

    上傳時間: 2013-11-18

    上傳用戶:swaylong

  • Design Safe Verilog State Machine(Synplicity)

      One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability analysis to determine all the states that could possibly bereached, and optimize away all states and transition logic that can not be reached.Thus, producing a highly optimal final implementation of the state machine.

    標簽: Synplicity Machine Verilog Design

    上傳時間: 2013-10-20

    上傳用戶:蒼山觀海

  • UART 4 UART參考設計,Xilinx提供VHDL代碼

    UART 4 UART參考設計,Xilinx提供VHDL代碼 uart_vhdl This zip file contains the following folders:  \vhdl_source  -- Source VHDL files:      uart.vhd  - top level file      txmit.vhd - transmit portion of uart      rcvr.vhd -  - receive portion of uart \vhdl_testfixture  -- VHDL Testbench files. This files only include the testbench behavior, they         do not instantiate the DUT. This can easily be done in a top-level VHDL          file or a schematic. This folder contains the following files:      txmit_tb.vhd  -- Test bench for txmit.vhd.      rcvr_tf.vhd  -- Test bench for rcvr.vhd.

    標簽: UART Xilinx VHDL 參考設計

    上傳時間: 2013-11-02

    上傳用戶:18862121743

  • 各種功能的計數(shù)器實例(VHDL源代碼)

    各種功能的計數(shù)器實例(VHDL源代碼):ENTITY counters IS  PORT  (   d  : IN  INTEGER RANGE 0 TO 255;   clk  : IN BIT;   clear : IN BIT;   ld  : IN BIT;   enable : IN BIT;   up_down : IN BIT;   qa  : OUT  INTEGER RANGE 0 TO 255;   qb  : OUT  INTEGER RANGE 0 TO 255;   qc  : OUT  INTEGER RANGE 0 TO 255;   qd  : OUT  INTEGER RANGE 0 TO 255;   qe  : OUT  INTEGER RANGE 0 TO 255;   qf  : OUT  INTEGER RANGE 0 TO 255;   qg  : OUT  INTEGER RANGE 0 TO 255;   qh  : OUT  INTEGER RANGE 0 TO 255;   qi  : OUT  INTEGER RANGE 0 TO 255;

    標簽: VHDL 計數(shù)器 源代碼

    上傳時間: 2013-10-09

    上傳用戶:松毓336

  • 低噪聲電壓基準的噪聲測量

      Frequently, voltage reference stability and noise defi nemeasurement limits in instrumentation systems. In particular,reference noise often sets stable resolution limits.Reference voltages have decreased with the continuingdrop in system power supply voltages, making referencenoise increasingly important. The compressed signalprocessing range mandates a commensurate reductionin reference noise to maintain resolution. Noise ultimatelytranslates into quantization uncertainty in A to D converters,introducing jitter in applications such as scales, inertialnavigation systems, infrared thermography, DVMs andmedical imaging apparatus. A new low voltage reference,the LTC6655, has only 0.3ppm (775nV) noise at 2.5VOUT.Figure 1 lists salient specifi cations in tabular form. Accuracyand temperature coeffi cient are characteristic ofhigh grade, low voltage references. 0.1Hz to 10Hz noise,particularly noteworthy, is unequalled by any low voltageelectronic reference.

    標簽: 低噪聲 電壓基準 噪聲測量

    上傳時間: 2013-10-30

    上傳用戶:wxhwjf

  • 基于單片機的USB主從機的設計與實現(xiàn)

    隨著總線和接口技術的發(fā)展,在工業(yè)場合如何更加可靠、快速、便捷地進行數(shù)據(jù)傳輸成為該領域通信的研究重點之一。而USB技術以其高速、可靠、通用性強等一系列特點在過去的十多年時間里發(fā)展迅猛,而USB OTG技術的誕生,使得兩USB設備在沒有PC參與的情況下進行數(shù)據(jù)傳輸成為可能。本文通過搭建以16位微處理器MSP430F149為核心控制芯片、ISPl362為USB接口芯片的硬件平臺,分別實現(xiàn)了USB部分主機和從機功能,使之能進行USB數(shù)據(jù)的存儲與交換。本文完成以下工作:首先,認真研究USB協(xié)議,深入理解USB通信的基本概念和傳輸方式等內(nèi)容。仔細分析USB Mass Storage類協(xié)議,并討論了采用BULK-ONLY傳輸實現(xiàn)Mass Storage類協(xié)議的方法,并對SCSI指令集等進行了深入的剖析。其次,根據(jù)要求,設計出由控制、接口、數(shù)據(jù)存儲、過流保護與供電切換電路等硬件模塊組成的系統(tǒng),在ALTIUM 2004軟件上完成原理圖的設計和PCB圖的布局、布線,并完成硬件調(diào)試工作。再次,在已構建的硬件平臺上,針對ISPl362 USB接口芯片的主/從機功能,分別設計了USB主機和從機的固件程序。利用IAR Workbench、BusHound等軟件進行固件程序的調(diào)試,最終USB主機可對u盤進行檢測、識別與配置;USB設備實現(xiàn)了USB設備的基本功能,能夠被Windows XP操作系統(tǒng)識別,與PC機之間實現(xiàn)數(shù)據(jù)的批量傳輸。最后,用DriverWorks軟件包的Driver Wizard生成驅(qū)動程序框架,并利用Windows DDK和vc++等軟件進行驅(qū)動程序的編譯,最終生成基于Windows操作系統(tǒng)的WDM型USB設備驅(qū)動程序。通過對USB通信協(xié)議的研究,本人成功地構建了以MsP430F149和ISPl362為核心的硬件試驗平臺,并在此平臺上進行USB主機、從機通信試驗。經(jīng)測試表明,PC機能檢測、識別、讀寫USB設備,其讀取與寫入速度分別為560KB/s和312Ⅺ玳。而主機能識別、配置接入的U盤。關鍵詞:USB主機、USB從機、MSI'430F149、ISPl362、BuR-Only傳輸

    標簽: USB 單片機

    上傳時間: 2013-10-11

    上傳用戶:淺言微笑

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