準(zhǔn)時(shí)化生產(chǎn)（just-in-time，JIT）誕生于20世紀(jì)50年代的日本，并于70年代全球石油危機(jī)中倍受關(guān)注。準(zhǔn)時(shí)化生產(chǎn)是豐田生產(chǎn)方式的核心。它采用“看板管理”實(shí)現(xiàn)“拉動(dòng)”式生產(chǎn)，與傳統(tǒng)的以計(jì)劃為主的“推動(dòng)”式生產(chǎn)有著本質(zhì)區(qū)別。全面質(zhì)量管理、設(shè)備合理布置、作業(yè)標(biāo)準(zhǔn)化、設(shè)備快速調(diào)整以及良好的外部協(xié)作等方法，確保了準(zhǔn)時(shí)化生產(chǎn)的順利實(shí)施。
標(biāo)簽： just-in-time 準(zhǔn)時(shí)
上傳時(shí)間： 2017-05-25
上傳用戶：zwei41
Kth Largest element in an array in time O(n) without sorting the entire array.
標(biāo)簽： array Largest element sorting
上傳時(shí)間： 2014-01-08
上傳用戶：woshini123456
Star Trek_ Deep Space Nine - A Stitch in Time - Andrew J. Robinson 英文版 格式 epub
標(biāo)簽： Stitch Space Star Deep Nine Trek Time in
上傳時(shí)間： 2021-06-17
上傳用戶：potato
分?jǐn)?shù)階統(tǒng)一混沌系統(tǒng)的離散算法-This the program for fractional order Unified system, a simple but fast method in time domain.
標(biāo)簽： fractional program Unified method
上傳時(shí)間： 2014-01-22
上傳用戶：lo25643
Demonstration circuit 1562A is an engineering toolto design and evaluate the LTC699X-X family ofTimerBlox circuits. The center section of the boardcontains a pre-configured TimerBlox function.DC1562A comes in twelve timing function variationsas outlined in Table 1.Surrounding the center board is a ”playground”prototyping area. The prototyping area has padsfor Dip-8, S8, MS8, or S6 packages with breadboarding connections to each pin and two convenientpower buses and ground bus surrounding theentire area. This area is for conditioning signals tocontrol the timer function and for adding loads controlled in time.
標(biāo)簽： 6994 LTC PCB 參考設(shè)計(jì)
上傳時(shí)間： 2013-10-18
上傳用戶：如果你也聽說
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
標(biāo)簽： Signal Input Fall Rise
上傳時(shí)間： 2013-10-23
上傳用戶：copu
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
標(biāo)簽： C16x 微控制器 輸入信號(hào) 時(shí)序圖
上傳時(shí)間： 2014-04-02
上傳用戶：han_zh
madCollection 2.5.2.6 full source This is not your every day VCL component collection. You won t see many new colored icons in the component palette. My packages don t offer many visual components to play with. Sorry, if you expected that! My packages are about low-level stuff for the most part, with as easy handling as possible. To find the hidden treasures, you will have to look at the documentation (which you re reading just in the moment). Later I plan on writing some nice demos, but for now the documentation must be enough to get you started.
標(biāo)簽： madCollection collection component source
上傳時(shí)間： 2014-01-18
上傳用戶：yoleeson
DFT(Discrete Fourier Transformation)是數(shù)字信號(hào)分析與處理如圖形、語音及圖像等領(lǐng)域的重要變換工具，直接計(jì)算DFT的計(jì)算量與變換區(qū)間長(zhǎng)度N的平方成正比。當(dāng)N較大時(shí)，因計(jì)算量太大，直接用DFT算法進(jìn)行譜分析和信號(hào)的實(shí)時(shí)處理是不切實(shí)際的。快速傅立葉變換(Fast Fourier Transformation，簡(jiǎn)稱FFT)使DFT運(yùn)算效率提高1～2個(gè)數(shù)量級(jí)。其原因是當(dāng)N較大時(shí)，對(duì)DFT進(jìn)行了基4和基2分解運(yùn)算。FFT算法除了必需的數(shù)據(jù)存儲(chǔ)器ram和旋轉(zhuǎn)因子rom外，仍需較復(fù)雜的運(yùn)算和控制電路單元，即使現(xiàn)在,實(shí)現(xiàn)長(zhǎng)點(diǎn)數(shù)的FFT仍然是很困難。本文提出的FFT實(shí)現(xiàn)算法是基于FPGA之上的，算法完成對(duì)一個(gè)序列的FFT計(jì)算，完全由脈沖觸發(fā)，外部只輸入一脈沖頭和輸入數(shù)據(jù)，便可以得到該脈沖頭作為起始標(biāo)志的N點(diǎn)FFT輸出結(jié)果。由于使用了雙ram，該算法是流型(Pipelined)的，可以連續(xù)計(jì)算N點(diǎn)復(fù)數(shù)輸入FFT，即輸入可以是分段N點(diǎn)連續(xù)復(fù)數(shù)數(shù)據(jù)流。采用DIF(Decimation In Frequency)-FFT和DIT(Decimation In Time)-FFT對(duì)于算法本身來說是無關(guān)緊要的，因?yàn)閮煞N情況下只是存儲(chǔ)器的讀寫地址有所變動(dòng)而已，不影響算法的結(jié)構(gòu)和流程，也不會(huì)對(duì)算法復(fù)雜度有何影響。
標(biāo)簽： Transformation Discrete Fourier DFT
上傳時(shí)間： 2016-04-12
上傳用戶：lx9076
Computing and the way people use C for doing it keeps changing as years go by. So overwhelming has been the response to all the previous editions of “Let Us C” that I have now decided that each year I would come up with a new edition of it so that I can keep the readers abreast with the way C is being used at that point in time.
標(biāo)簽： overwhelming Computing changing people
上傳時(shí)間： 2013-12-23
上傳用戶：epson850
蟲蟲下載站版權(quán)所有 京ICP備2021023401號(hào)-1
