The source code for this package is located in src/gov/nist/sip/proxy. The proxy
is a pure JAIN-SIP application: it does not need proprietary nist-sip
classes in addition of those defined in JAIN-SIP 1.1, you can substitute
the NIST-SIP stack by another JAIN-SIP-1.1 compliant stack and it should
interoperate.
he proxy can act as presence server and be able to process NOTIFY and
SUBSCRIBE requests. If this parameter is disabled, the proxy will simply
forward those kind of requests following the appropriate routing decision.
he source code for this package is located in src/ directory. The
JAIN-SIP-SERVICES is a JAIN-SIP application: it does not need proprietary nist-sip
classes in addition of those defined in JAIN-SIP 1.1, you can substitute
the NIST-SIP stack by another JAIN-SIP-1.1 compliant stack and it should
interoperate.
6自由度puma機(jī)器人仿真程序源碼。This is PUMA3d.M, a 3D Matlab Kinematic model of a Puma robot located in the robotics lab of Walla Walla University.
The file uses CAD data converted to Matlab using cad2matdemo.m, which is located on the Mathworks central file exchange.
％
％ This file is still being developed, for the latest version check the
％ Mathworks central file exchange.
1. It is located in the root directory - SecurityBuilderDemo.exe. Leave password box blank and click on Security button
in order to Add/Remove users and set user rights. Once you entered Security dialog you may select your Supervisor password.
2. Click OK when finished configuring users. Don t forget to disable some features in order to see what
happens with GUI elements - menus, and buttons.
This document provides practical, common guidelines for incorporating PCI Express interconnect
layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10-
layer or more server baseboard designs. Guidelines and constraints in this document are intended
for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI
Express devices located on the same baseboard (chip-to-chip routing) and interconnects between
a PCI Express device located “down” on the baseboard and a device located “up” on an add-in
card attached through a connector.
This document is intended to cover all major components of the physical interconnect including
design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card
edge-finger and connector considerations. The intent of the guidelines and examples is to help
ensure that good high-speed signal design practices are used and that the timing/jitter and
loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect.
However, while general physical guidelines and suggestions are given, they may not necessarily
guarantee adequate performance of the interconnect for all layouts and implementations.
Therefore, designers should consider modeling and simulation of the interconnect in order to
ensure compliance to all applicable specifications.
The document is composed of two main sections. The first section provides an overview of
general topology and interconnect guidelines. The second section concentrates on physical layout
constraints where bulleted items at the beginning of a topic highlight important constraints, while
the narrative that follows offers additional insight.
The latest generation of Texas Instruments (TI) boardmountedpower modules utilizes a pin interconnect technologythat improves surface-mount manufacturability.These modules are produced as a double-sided surfacemount(DSSMT) subassembly, yielding a case-less constructionwith subcomponents located on both sides of theprinted circuit board (PCB). Products produced in theDSSMT outline use the latest high-efficiency topologiesand magnetic-component packaging. This providescustomers with a high-efficiency, ready-to-use switchingpower module in a compact, space-saving package. Bothnonisolated point-of-load (POL) switching regulators andthe isolated dc/dc converter modules are being producedin the DSSMT outline.TI’s plug-in power product line offers power modules inboth through-hole and surface-mount packages. The surfacemountmodules produced in the DSSMT outline use asolid copper interconnect with an integral solder ball fortheir
介紹了一種基于C8051F020單片機(jī)的多路壓力測量儀。該測量儀選用電阻應(yīng)變式壓力傳感器采集壓力信號(hào)，并經(jīng)放大電路處理后送入C8051F020單片機(jī)，再由C8051F020單片機(jī)內(nèi)部的A/D轉(zhuǎn)換器將采集到的壓力信號(hào)進(jìn)行模數(shù)轉(zhuǎn)化，然后分別對(duì)數(shù)據(jù)進(jìn)行存儲(chǔ)和顯示。該測量儀能測量6路壓力信號(hào)，并且各測量點(diǎn)都能單獨(dú)檢測和設(shè)置。由于采用了C8051F020單片機(jī)，簡化了硬件電路，增強(qiáng)了抗干擾能力，使得測量儀具有測量精度高，沖擊小等特點(diǎn)。
Abstract:
A measurement apparatus for multi-channel pressure based on single chip microcomputer is introduced.It can measure 6 channels signal of the pressure，and the pressure measure points can be detection and located individually.The pressure signal sampling is obtained by resistor stress-type pressure sensors，the digital signals of 6 channels are collected through amplifying and adjustment circuit of pressure signals and internal integrated A/D converter of MCU.Finally，and it realizes the function to store and display data separately.C8051F020 was used to made hardware circuit simple，and it also enhanced the anti-interference ability.It features high precision and little impact.
介紹一種基于單片機(jī)的多路溫度采集及監(jiān)控系統(tǒng)，能夠測量6路溫度信號(hào)，具有計(jì)算機(jī)聯(lián)網(wǎng)功能，各測量點(diǎn)可以單獨(dú)監(jiān)控和設(shè)置，可根據(jù)用戶的需求自動(dòng)控制。測量溫度范圍為-10 ℃～200 ℃，控制方式采用模擬量調(diào)壓模式。該系統(tǒng)具有控制精度高、沖擊小等特點(diǎn)。
Abstract:
A temperature collecting and surveillance-controlling system based on sing-chip microcomputer is introduced. It can measure 6 channel signal of the temperature,and it has a function of network connection.The temperature measure points can be monitored and located, it can be controlled automatic according to user’s demand.The temperature range is -10℃ to 200℃.The model of control is adjustable voltage with simulation. It features high precision and little impact.
What is New in C51 Version 8.18[Device Support]Added debug support for the NXP P89LPC9408 in the LPC900 EPM Emulator/Programmer.[New Supported Device]Nuvoton W681308 device.[New Supported Device]NXP P89LPC9201, P89LPC9211, P89LPC922A1, P89LPC9241, P89LPC9251, P89LPC9301, P89LPC931A1, P89LPC9331, P89LPC9341, and P89LPC9351 devices.[New Supported Device]SiLabs C8051F500, C8051F501, C8051F504, C8051F505, C8051F506, C8051F507, C8051F508, C8051F509, C8051F510, and C8051F511 devices.[ULINK2 Support]Corrected potential deadlock on ST uPSD targets.[Device Simulation]Corrected simulation of Infineon XC800 MDU.[Device Simulation]Corrected behaviour of EXFn and TOGn on SiLabs C8051F12x/F13x devices.[Device Simulation]Added simulation for Atmel AT89C51RE2, including simulation of second UART.[Cx51 Compiler]Corrected failed initialization on far addresses when the object is located with _at_.
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