The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.
上傳時間： 2013-10-09
上傳用戶：3294322651
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上傳時間： 2014-01-24
上傳用戶：s363994250
一個游戲 the hardware for the game includes a number of displays, each with a button and -- a light, that each represent a bin that can store marbles (beans). -- -- The display indicates the number of marbles in each bin at any given time. -- The light indecates that the present bin is not empty and that pushing the -- button is a valid move in the game. -- -- The button for each display indicates that a player takes the marbles from -- the selected bin, and takes them in his hand. The hand is represented by a -- diplay itself (no button). -- -- Each player has a home bin, located on opposite sides of the game.
標簽： the hardware displays includes
上傳時間： 2015-06-10
上傳用戶：cc1015285075
This libusb version 0.1.12. libusb is a library which allows userspace application access to USB devices. The official ftp site is: ftp://ftp.libusb.sourceforge.net/pub/libusb/ The official web site is: http://libusb.sourceforge.net/ A mailing list is located at: libusb-devel@lists.sourceforge.net
標簽： libusb application userspace library
上傳時間： 2013-12-21
上傳用戶：zhengzg
This prj demonstrates how to use the SROM memory classes for the Dallas DS80C400. This example uses the memcpy function to copy a function in the SROM memory class (which is located in CODE memory) to von Neumann mapped XDATA (starting at 0x110000) for execution.
標簽： This demonstrates the classes
上傳時間： 2013-12-22
上傳用戶：tuilp1a
Welcome to the software files for the ADS8361 to TMS320F2812! There are two project files in each of the folders McBSP, SPI and Both. Mode II and IV are explored using the McBSP port alone, as well as the SPI port. These projects are located in the SPI and McBSP folders. Modes I and III are explored using both McBSP and SPI. In Mode I, the M0 and M1 pins are controlled by use of the jumper on the evaluation module. A0 is controlled by the DX pin of the McBSP port. In Mode III, the A0, M0 and M1 pins are controlled via GPIO functions of PortF. The "SRC", "CMD" and "INCLUDE" files in the archive are from "C28x Peripheral Examples in C" (document # SPRC097). If you have questions about this or other Data Converter products, feel free to e-mail us at:
標簽： files the software Welcome
上傳時間： 2015-12-16
上傳用戶：lixinxiang
Example to support XML files using MSXML. ========================================= XML (Extensible Markup Language) is a commonly used basis for representing a huge range of structured data file formats. The specification is maintained by the World Wide Web Consortium (W3C?. This plugin is intended as an example of how XML data can be read with a DataPlugin. You can adjust it to meet the needs of your own XML file format. After installing the URI file (double click on it), you can find the VBScript file located at "C:\Program Files\National Instruments\Shared\USI\plugins\DataPlugins\XML Example" You can make changes to this file to read your specific XML file.
標簽： XML Example support Extensi
上傳時間： 2016-01-03
上傳用戶：cooran
how to use IOKitLib and IOUSBLib to set up asynchronous callbacks when a USB device is attached to or removed from the system is located at:
標簽： asynchronous callbacks IOKitLib IOUSBLib
上傳時間： 2013-12-25
上傳用戶：wangzhen1990
中南賽區ACM競賽題 Description Given a two-dimensional array of positive and negative integers, a sub-rectangle is any contiguous sub-array of size 1*1 or greater located within the whole array. The sum of a rectangle is the sum of all the elements in that rectangle. In this problem the sub-rectangle with the largest sum is referred to as the maximal sub-rectangle.
標簽： two-dimensional Description negative integers
上傳時間： 2013-12-22
上傳用戶：lijianyu172
The idea behind differential GPS is to remove as much errors as possible from the range measurements by establishing these errors at a reference site. In its most simple setup, a GPS receiver is located at a well surveyed position and its (pseudo) range measurements are compared with the actual calculated range from this receiver to the SV s. The differences between measured ranges and calculated ranges at the reference receiver are applied as corrections to the ranges measured by other receiver(s) close by.
標簽： differential measurements possible behind
上傳時間： 2013-12-19
上傳用戶：zgu489
