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low-frequency

  • CAT28LV64-64Kb CMOS并行EEPROM數據手

    The CAT28LV64 is a low voltage, low power, CMOS Parallel EEPROM organized as 8K x 8−bits. It requires a simple interface for in−system programming. On−chip address and data latches, self−timed write cycle with auto−clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bit signal the start and end of the self−timed write cycle. Additionally, the CAT28LV64 features hardware and software write protection.

    標簽: EEPROM 64 CMOS CAT

    上傳時間: 2013-11-16

    上傳用戶:浩子GG

  • A Single-Chip Pulsoximeter Des

    This application report discusses the design of non-invasive optical plethysmographyalso called as pulsoximeter using the MSP430FG437 Microcontroller (MCU). Thepulsoximeter consists of a peripheral probe combined with the MCU displaying theoxygen saturation and pulse rate on a LCD glass. The same sensor is used for bothheart-rate detection and pulsoximetering in this application. The probe is placed on aperipheral point of the body such as a finger tip, ear lobe or the nose. The probeincludes two light emitting diodes (LEDs), one in the visible red spectrum (660nm) andthe other in the infrared spectrum (940nm). The percentage of oxygen in the body isworked by measuring the intensity from each frequency of light after it transmitsthrough the body and then calculating the ratio between these two intensities.

    標簽: Pulsoximeter Single-Chip Des

    上傳時間: 2013-10-27

    上傳用戶:黑漆漆

  • 用戶程序示例教程

    用戶程序示例教程 The Blinky project is a simple program for the LPC2138using Keil MCB2130 Microcontroller Board. It blinks the LEDs at speed according to the Potentiometer setting and prints the current seting to the Serial Port 1.In addition it generates a sine wave with an adjustable frequency on the speaker of the board.

    標簽: 用戶 教程 程序

    上傳時間: 2014-12-27

    上傳用戶:hongmo

  • MC9S08QG8英文資料 pdf

    MC9S08QG8英文資料 The MC9S08QG8 is the newest member of the Freescale 8-bit family of highly integratedmicrocontrollers, based on the high-performance yet low power HCS08 core. The MC9S08QG8is an excellent solution for power-sensitive applications with extended battery life and maximum performance down to 1.8VDC.

    標簽: MC9 S08 QG8

    上傳時間: 2014-12-28

    上傳用戶:dxxx

  • XL6003 300KHz 36V Boost 3W LED

    The XL6003 regulator is fixed frequency PWM Boost (step-up) DC/DC converter, capable ofdriving 1050mA load current with excellent line and load regulation. The regulator is simple to use because it includes internal frequency compensation and a fixed-frequency oscillator so that it requires a minimum number of external components to work. The XL6003 could directly drive 5~10 3W LED units at VIN=12V.

    標簽: Boost 6003 300 36V

    上傳時間: 2013-11-07

    上傳用戶:xy@1314

  • 支持USB PS2 UART SPI CRC功能的凌陽8位單

    1、 支持USB 1.1通訊協議;2、 支持高速(Full Speed、12Mbps )和低速(Low Speed、1.5Mbps )傳輸;3、 6MHz晶體,鎖相環PLL振蕩器提供高速、低速所需時鐘源;4、 支持3個端口(endpoint),可獨立編程為IN 或 OUT端口。5、 PS/2:支持PS/2協議(eg.鼠標),與USB復用。

    標簽: UART USB PS2 CRC

    上傳時間: 2013-11-03

    上傳用戶:hbsunhui

  • PCA9517 Level translating I2C-

    The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Usingthe PCA9517 enables the system designer to isolate two halves of a bus for both voltageand capacitance. The SDA and SCL pins are over voltage tolerant and arehigh-impedance when the PCA9517 is unpowered.

    標簽: translating Level 9517 PCA

    上傳時間: 2013-12-25

    上傳用戶:wsf950131

  • PCA9519 4channel level transla

    The PCA9519 is a 4-channel level translating I2C-bus/SMBus repeater that enables theprocessor low voltage 2-wire serial bus to interface with standard I2C-bus or SMBus I/O.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling the I2C-bus or SMBusmaximum capacitance of 400 pF on the higher voltage side. The SDA and SCL pins areover-voltage tolerant and are high-impedance when the PCA9519 is unpowered.

    標簽: 4channel transla level 9519

    上傳時間: 2013-11-19

    上傳用戶:jisiwole

  • PCA9544A 4channel I2C multiple

    The PCA9544A provides 4 interrupt inputs, one for each channeland one open drain interrupt output. When an interrupt is generated byany device, it will be detected by the PCA9544A and the interruptoutput will be driven LOW. The channel need not be active fordetection of the interrupt. A bit is also set in the control byte.Bits 4 – 7 of the control byte correspond to channels 0 – 3 of thePCA9544A, respectively. Therefore, if an interrupt is generated byany device connected to channel 2, the state of the interrupt inputs isloaded into the control register when a read is accomplished.Likewise, an interrupt on any device connected to channel 0 wouldcause bit 4 of the control register to be set on the read. The mastercan then address the PCA9544A and read the contents of thecontrol byte to determine which channel contains the devicegenerating the interrupt. The master can then reconfigure thePCA9544A to select this channel, and locate the device generatingthe interrupt and clear it. The interrupt clears when the deviceoriginating the interrupt clears.

    標簽: 4channel multiple 9544A 9544

    上傳時間: 2014-12-28

    上傳用戶:潛水的三貢

  • PCA9549 Octal bus switch with

    The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-bus, determined by the contents of the programmable Controlregister. When the I2C-bus bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-bus bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW reset input (RESET) allows the PCA9549 to recover from a situationwhere the I2C-bus is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-busstate machine and causes all the bits to be open, as does the internal power-on resetfunction.

    標簽: switch Octal 9549 with

    上傳時間: 2014-11-22

    上傳用戶:xcy122677

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