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AM26C31CLow Power, I CC = 100 ƒ ⊂ A Typ Operate From a Single 5-V Supply High Speed, t PLH = t PHL = 7 ns Typ Low Pulse Distortion, t sk(p) = 0.5 ns Typ High Output Impedance in Power-Off Conditions Improved Replacement for AM26LS31
標簽： Operate Single Supply Power
上傳時間： 2014-01-20
上傳用戶：gtzj
Supplemental information for a high-speed serial bus that integrates well with most IEEE standard 32-bit and 64-bit parallel buses is specified. It is intended to extend the usefulness of a low-cost interconnect between external peripherals, IEEE Std 1394-1995. This standard follows the ISO/IEC 13213:1994 Command and Status Register (CSR) architecture.
標簽： Supplemental information high-speed integrates
上傳時間： 2014-03-07
上傳用戶：jjj0202
The UMTS Physical Layer model consists of an end-to-end (transmitter-to-receiver) simulation of the Frequency Division Duplex (FDD) Downlink physical layer for several Dedicated Channels (DCH) as specified by the 3GPP standard (Release 99).
標簽： transmitter-to-receiver end-to-end simulation Physical
上傳時間： 2014-01-11
上傳用戶：it男一枚
The STi7200 is a new generation, high-definition set-top box/DVD decoder chip, and provides very high performance for low-cost HD systems. With enhanced performance over the STx7109, it includes both Windows Media Video 9 and H.264 video decoders for new, low bitrate applications. The STi7200 is able to decode two HD programs
標簽： high-definition generation provides decoder
上傳時間： 2013-11-29
上傳用戶：xg262122
頻率合成技術在現代電子技術中具有重要的地位。在通信、雷達和導航等設備中，它可以作為干擾信號發生器；在測試設備中，可作為標準信號源，因此頻率合成器被人們稱為許多電子系統的“心臟”。直接數字頻率合成（DDS——Digital Direct Frequency Synthesis）技術是一種全新的頻率合成方法，是頻率合成技術的一次革命。本文主要分析了DDS的基本原理及其輸出頻譜特點，并采用VHDL語言在FPGA上實現。對于DDS的輸出頻譜，一個較大的缺點是：輸出雜散較大。針對這一缺點本文使用了兩個方法加以解決。首先是壓縮ROM查找表，
上傳時間： 2017-09-28
上傳用戶：大三三
OFDM(Orthogonal Frequency Division Multiplexing)即正交頻分復用技術，實際上OFDM是多載波調制的一種。其主要思想是：將信道分成若干正交子信道，將高速數據信號轉換成并行的低速子數據流，調制到在每個子信道上進行傳輸。正交信號可以通過在接收端采用相關技術來分開，這樣可以減少子信道之間的相互干擾 ICI 。每個子信道上的信號帶寬小于信道的相關帶寬，因此每個子信道上的可以看成平坦性衰落，從而可以消除符號間干擾。而且由于每個子信道的帶寬僅僅是原信道帶寬的一小部分，信道均衡變得相對容易。
標簽： OFDM
上傳時間： 2015-02-17
上傳用戶：hongyun288
FILE NAME: dc_motor.c CHIP TYPE: ATMEGA16 CLOCK FREQUENCY: 8MHZ IDE: VSMStudio COMPILER: AVR-GCC
標簽： PWM
上傳時間： 2015-03-01
上傳用戶：abilibili
LVDS：Low Voltage Differential Signaling，低電壓差分信號。 LVDS傳輸支持速率一般在155Mbps（大約為77MHZ）以上。
標簽： 差分信號
上傳時間： 2015-03-04
上傳用戶：初夏淺淺時光
The TJA1040 is an advanced high speed CAN transceiver for use in automotive and general industrial applications. It supports the differential bus signal representation described in the international standard for in-vehicle high speed CAN applications (ISO11898). CAN (Controller Area Network) is the standard protocol for serial in-vehicle bus communication, particularly for Engine Management and Body Multiplexing. The TJA1040 provides a Standby mode, as known from its functional predecessors PCA82C250 and PCA82C251, but with significantly reduced power consumption. Besides the excellent low-power behavior the TJA1040 offers several valuable system improvements. Highlights are the absolute passive bus behavior if the device is unpowered as well as the excellent EMC performance.
標簽： CAN
上傳時間： 2015-03-23
上傳用戶：Yuan Lo
EPC ?? ??? ?? ????
上傳時間： 2015-06-04
上傳用戶：gw0214
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