RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit is present on the output marked Q. Normally, in storage mode, the S and R inputs are both low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S (Set) is pulsed high while R is held low, then the Q output is forced high, and stays high when S returns to low similarly, if R (Reset) is pulsed high while S is held low, then the Q output is forced low, and stays low when R returns to low.
標簽： using fundamental the RS_latch
上傳時間： 2017-07-30
上傳用戶：努力努力再努力
This is an example program showing how to use the LMX2326 chip. The program configures the chip and then prompts the user for a channel number. When the channel number is entered, the pll tunes to the desired frequency.
標簽： program chip configures the
上傳時間： 2017-08-04
上傳用戶：小儒尼尼奧
Abstract—We describe a technique for image encoding in which local operators of many scales but identical shape serve as the basis functions. The representation differs from established techniques in that the code elements are localized in spatial frequency as well as in space.
標簽： technique operators Abstract describe
上傳時間： 2014-01-23
上傳用戶：ruixue198909
本系統(tǒng)分電壓測量和信號產(chǎn)生輸出兩大部分，電壓測量部分以模擬電路為主，配合放大模塊、A/D轉(zhuǎn)化模塊、顯示模塊；通過凌陽單片機進行數(shù)據(jù)處理，在誤差允許范圍內(nèi)顯示測量電壓值。信號產(chǎn)生以直接數(shù)字式頻率合成器(Direct Digital Frequency Synthesis,簡稱DDS或DDFS)為核心，經(jīng)過AT89S52對DDS芯片內(nèi)部進行控制，使之輸出標準正弦波形，利用編程實現(xiàn)頻率預(yù)置、步進，達到電壓輸出頻率的可調(diào)節(jié)步進。通過調(diào)試與測量完成了題目的基本部分和全部發(fā)揮部分的要求并有自己的創(chuàng)新
標簽： 分 信號產(chǎn)生 電壓測量
上傳時間： 2017-08-08
上傳用戶：comua
The function applies the Madsen method for Doppler Centroid estimation. The input are: 1) the raw data, the parameter of the distance between samples in azimuth to be correlated and the PRF (Pulse repetition frequency)
標簽： estimation The the Centroid
上傳時間： 2017-08-12
上傳用戶：pinksun9
Title : Implementation of quadrature modulation and demodulation Design Object : By implementing quadrature modulation and demodulation of analog signals in digital signal processing, students will have better understanding of sampling and frequency analysis of discrete-time signals. Design Content : Make a MATLAB function which performs quadrature modulation and demodulation for a input signal with anti-aliasing filtering.
標簽： Implementation demodulation implementing modulation
上傳時間： 2013-12-09
上傳用戶：蠢蠢66
While faster processors, larger memory, and powerful graphics are fundamental requirements for workstations, users are also demanding a low-cost, solution-based approach wrapped around a standards-based technology. The Sun UltraTM 20 Workstation, which leverages the AMD OpteronTM processor with Direct Connect Architecture based on AMD64 technology, provides multiple operating system choices and leading nVidia graphics, delivers a platform that offers flexibility and performance in a cost-effective package with solutions to benefit customers across the board.
標簽： requirements fundamental processors graphics
上傳時間： 2017-08-17
上傳用戶：zhaiye
This document explains the pulse compression technique. Why it is required and how can it be used effectively. The pulse compression technique helps to increase the maximum range without sacrificing the range resolution and still the power requirement remains low.
標簽： compression technique document explains
上傳時間： 2013-12-18
上傳用戶：fnhhs
a carrier sense multiple access with collision avoidance (CSMA/CA) based MAC protocol, called nanoMAC, suitable for low bit-rate, low-power wireless devices with high efficiency
標簽： avoidance collision multiple protocol
上傳時間： 2017-08-28
上傳用戶：小寶愛考拉
This manual describes SAMSUNG s S3C2410X 16/32-bit RISC microprocessor. This product is designed to provide hand-held devices and general applications with cost-effective, low-power, and high-performance microcontroller solution in small die size. To reduce total system cost, the S3C2410X includes the following components separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD Controller (STN & TFT), NAND Flash Boot Loader, System Manager (chip select logic and SDRAM Controller), 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8-ch 10-bit ADC and Touch Screen Interface, IIC-BUS Interface, IIS-BUS Interface, USB Host, USB Device, SD Host & Multi-Media Card Interface, 2-ch SPI and PLL for clock generation.
標簽： This microprocessor describes S3C2410X
上傳時間： 2014-01-11
上傳用戶：shizhanincc
蟲蟲下載站版權(quán)所有 京ICP備2021023401號-1
