NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.
上傳時間： 2013-11-15
上傳用戶：zouxinwang
LLCR Pin Socket Testing with the Model 3732 High Density Matrix Card Computer processors (CPUs) today have come a long way from the computer processors of the past. They draw more power, run at lower voltages, and have more pins than ever before.
標(biāo)簽： Testing Socket LLCR with
上傳時間： 2013-10-24
上傳用戶：whenfly
The PCA9534 is a 16-pin CMOS device that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
上傳時間： 2013-11-17
上傳用戶：vodssv
The LPC1769/68/67/66/65/64 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration.
上傳時間： 2014-02-20
上傳用戶：13215175592
Virtex-5, Spartan-DSP FPGAs Application Note This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
標(biāo)簽： Spartan-DSP Virtex FPGAs Ap
上傳時間： 2013-10-23
上傳用戶：raron1989
1.The C Programming Language is a powerful, flexible andpotentially portable high-level programming language. 2.The C language may be used successfully to create a programfor an 8-bit MCU, but to produce the most efficient machinecode, the programmer must carefully construct the C Languageprogram.3.The programmer must not only create an efficient high leveldesign, but also pay attention to the detailed implementation.
標(biāo)簽： FREESCALE 單片機(jī) 編程 教程
上傳時間： 2013-12-27
上傳用戶：huanglang
匯編器在微處理器的驗證和應(yīng)用中舉足輕重，如何設(shè)計通用的匯編器一直是研究的熱點之一。本文提出了一種開放式的匯編器系統(tǒng)設(shè)計思想，在匯編語言與機(jī)器語言間插入中間代碼CMDL（code mapping description language）語言，打破匯編語言與機(jī)器語言的直接映射關(guān)系，由此建立起一套描述匯編語言與機(jī)器語言的開放式映射體系。基于此開放式映射體系開發(fā)了一套匯編器系統(tǒng)，具有較高層次上的通用性和可移植性。【關(guān)鍵詞】指令集，CMDL，匯編器，開放式 Design of Retargetable Assembler System Liu Ling Feng Wen Nan Wang Ying Chun Jiang An Ping Ji Li Jiu IME of Peking University, 100871【摘要】An assembler plays a very important role in the field of microprocessor verifications and applications, thus how to build a retargetable assembler system has been a hotspot in this field for long time. This paper presents a new method about the retargetable assembler system design.It provides a kind of language CMDL, code mapping description language. During the process of assembling, assembler languages are firstly translated to CMDL, and then mapped to the machine codes. In an other word, CMDL is inserted between assembler languages and machine codes during the translation procedure. As a medium code, CMDL has a lot of features, such as high extraction, strong descript capabilities. It can describe almost all attributes of assembler languages. By breaking the direct mapping relationship between assembler languages and machine codes, the complexities of machine codes are hided to the users, therefore, the new retargetable assembler system has higher retargetable level by converting the mapping from assembler languages and machine codes to assembler languages and CMDL, and implementationof it becomes easier. Based on the new mapping system structure, a retargetable assemblersystem is developed. It proved the whole system has good retargetability and implantability.【關(guān)鍵詞】instruction set, symbol table, assembler, lexical analysis, retargetability
上傳時間： 2013-10-10
上傳用戶：meiguiweishi
The PCA9534 is a 16-pin CMOS device that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
標(biāo)簽： interru SMBus power 9534
上傳時間： 2013-10-10
上傳用戶：inwins
The PCA9535 and PCA9535C are 24-pin CMOS devices that provide 16 bits of GeneralPurpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and wasdeveloped to enhance the NXP Semiconductors family of I2C-bus I/O expanders. Theimprovements include higher drive capability, 5 V I/O tolerance, lower supply current,individual I/O configuration, and smaller packaging. I/O expanders provide a simplesolution when additional I/O is needed for ACPI power switches, sensors, push buttons,LEDs, fans, etc.
上傳時間： 2013-10-21
上傳用戶：愛死愛死
The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed toenhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvementsinclude higher drive capability, 5 V I/O tolerance, lower supply current, individual I/Oconfiguration, and smaller packaging. I/O expanders provide a simple solution whenadditional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Outputand Polarity Inversion (active HIGH or active LOW operation) registers. The systemmaster can enable the I/Os as either inputs or outputs by writing to the I/O configurationbits. The data for each Input or Output is kept in the corresponding Input or Outputregister. The polarity of the read register can be inverted with the Polarity Inversionregister. All registers can be read by the system master. Although pin-to-pin and I2C-busaddress compatible with the PCF8575, software changes are required due to theenhancements, and are discussed in Application Note AN469.
上傳時間： 2013-11-13
上傳用戶：fredguo
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