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mID-Square

  • 采用TüV認(rèn)證的FPGA開發(fā)功能安全系統(tǒng)

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System

    標(biāo)簽: FPGA 安全系統(tǒng)

    上傳時間: 2013-11-05

    上傳用戶:維子哥哥

  • 6小時學(xué)會labview

    6小時學(xué)會labview, labview Six Hour Course – Instructor Notes   This zip file contains material designed to give students a working knowledge of labview in a 6 hour timeframe. The contents are: Instructor Notes.doc – this document. labviewIntroduction-SixHour.ppt – a PowerPoint presentation containing screenshots and notes on the topics covered by the course. Convert C to F (Ex1).vi – Exercise 1 solution VI. Convert C to F (Ex2).vi – Exercise 2 solution subVI. Thermometer-DAQ (Ex2).vi – Exercise 2 solution VI. Temperature Monitor (Ex3).vi – Exercise 3 solution VI. Thermometer (Ex4).vi – Exercise 4 solution subVI. Convert C to F (Ex4).vi – Exercise 4 solution subVI. Temperature Logger (Ex4).vi – Exercise 4 solution VI. Multiplot Graph (Ex5).vi – Exercise 5 solution VI. Square Root (Ex6).vi – Exercise 6 solution VI. State Machine 1 (Ex7).vi – Exercise 7 solution VI.   The slides can be presented in two three hour labs, or six one hour lectures. Depending on the time and resources available in class, you can choose whether to assign the exercises as homework or to be done in class. If you decide to assign the exercises in class, it is best to assign them in order with the presentation. This way the students can create VI’s while the relevant information is still fresh. The notes associated with the exercise slide should be sufficient to guide the students to a solution. The solution files included are one possible solution, but by no means the only solution.

    標(biāo)簽: labview

    上傳時間: 2013-10-13

    上傳用戶:zjwangyichao

  • ARM手機MID平板方案詳解

    ARM核心是主控SOC中的重要部分,系統(tǒng)的日常應(yīng)用都由ARM核心來完成,因此ARM核心的效能很大程度上跟用戶體驗有關(guān)。ARM公司一般用DMIPS/MHz來標(biāo)稱ARM核心的性能。DMIPS是Dhrystone Million Instructions executed Per Second的縮寫,反映核心的整數(shù)計算能力。但Dhrystone算法代碼本身比較叫,可以完全放到Cache中執(zhí)行,因此反映的只是核心能力,并不能反映緩存、內(nèi)存I/O性能。

    標(biāo)簽: ARM MID 手機 平板

    上傳時間: 2013-10-16

    上傳用戶:devin_zhong

  • 簡述PCB線寬和電流關(guān)系

      PCB線寬和電流關(guān)系公式   先計算Track的截面積,大部分PCB的銅箔厚度為35um(即 1oz)它乘上線寬就是截面積,注意換算成平方毫米。 有一個電流密度經(jīng)驗值,為15~25安培/平方毫米。把它稱上截面積就得到通流容量。   I=KT(0.44)A(0.75), 括號里面是指數(shù),   K為修正系數(shù),一般覆銅線在內(nèi)層時取0.024,在外層時取0.048   T為最大溫升,單位為攝氏度(銅的熔點是1060℃)   A為覆銅截面積,單位為square mil.   I為容許的最大電流,單位為安培。   一般 10mil=0.010inch=0.254mm 1A , 250mil=6.35mm 8.3A ?倍數(shù)關(guān)系,與公式不符 ?  

    標(biāo)簽: PCB 電流

    上傳時間: 2013-11-12

    上傳用戶:ljd123456

  • 采用TüV認(rèn)證的FPGA開發(fā)功能安全系統(tǒng)

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System

    標(biāo)簽: FPGA 安全系統(tǒng)

    上傳時間: 2013-11-14

    上傳用戶:zoudejile

  • This project is created using the Keil ARM CA Compiler. The Logic Analyzer built into the simula

    This project is created using the Keil ARM CA Compiler. The Logic Analyzer built into the simulator may be used to monitor and display any variable or peripheral I/O register. It is already configured to show the PWM output signal on PORT3.0 and PORT3.1 This ARM Example may be debugged using only the uVision Simulator and your PC--no additional hardware or evaluation boards are required. The Simulator provides cycle-accurate simulation of all on-chip peripherals of the ADuC7000 device series. You may create various input signals like digital pulses, sine waves, sawtooth waves, and square waves using signal functions which you write in C. Signal functions run in the background in the simulator within timing constraints you configure. In this example, several signal functions are defined in the included Startup_SIM.INI file.

    標(biāo)簽: the Analyzer Compiler project

    上傳時間: 2013-12-19

    上傳用戶:Yukiseop

  • The module LSQ is for unconstrained linear least-squares fitting. It is based upon Applied Statisti

    The module LSQ is for unconstrained linear least-squares fitting. It is based upon Applied Statistics algorithm AS 274 (see comments at the start of the module). A planar-rotation algorithm is used to update the QR- factorization. This makes it suitable for updating regressions as more data become available. The module contains a test for singularities which is simpler and quicker than calculating the singular-value decomposition. An important feature of the algorithm is that it does not square the condition number. The matrix X X is not formed. Hence it is suitable for ill- conditioned problems, such as fitting polynomials. By taking advantage of the MODULE facility, it has been possible to remove many of the arguments to routines. Apart from the new function VARPRD, and a back-substitution routine BKSUB2 which it calls, the routines behave as in AS 274.

    標(biāo)簽: least-squares unconstrained Statisti Applied

    上傳時間: 2015-05-14

    上傳用戶:aig85

  • 利用多態(tài)性編程

    利用多態(tài)性編程,創(chuàng)建一個square類,實現(xiàn)求三角形、正方形和圓形面積。方法 //抽象出一個共享的類,定義一個函數(shù)求面積的公共界面。再重新定義各面積的求面積 //函數(shù),在主類中創(chuàng)建不同類的對象,并求不同形狀的面積

    標(biāo)簽: 編程

    上傳時間: 2013-12-16

    上傳用戶:athjac

  • 讀取MapInfo的交換格式的MifMid文件

    讀取MapInfo的交換格式的Mif\Mid文件

    標(biāo)簽: MapInfo MifMid 讀取

    上傳時間: 2014-01-21

    上傳用戶:熊少鋒

  • 聲明一個基類Shape(點), 在此基礎(chǔ)上派生出Rectangle(長方形)和Circle(圓),這三個類都有GetArea()函數(shù)計算對象的面積,構(gòu)造函數(shù)

    聲明一個基類Shape(點), 在此基礎(chǔ)上派生出Rectangle(長方形)和Circle(圓),這三個類都有GetArea()函數(shù)計算對象的面積,構(gòu)造函數(shù),析構(gòu)函數(shù)等有關(guān)函數(shù)。再使用Rectangle類創(chuàng)建一個派生類Square(正方形)。并設(shè)計創(chuàng)建各種類的對象,調(diào)用所有函數(shù)。設(shè)計函數(shù)f(Shape &a)能對不同對象的實參調(diào)用計算打印出對象的面積。

    標(biāo)簽: Rectangle GetArea Circle Shape

    上傳時間: 2015-07-07

    上傳用戶:netwolf

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