The DSPLIB is a collection of 39 high-level optimized DSP functions for the TMS320C64x device. This source code library includes C-callable functions (ANSI-C language compatible) for general signal processing math and vector functions.
標簽： collection high-level functions optimized
上傳時間： 2016-10-16
上傳用戶：gengxiaochao
The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control and data transfer communication between ICs. Some of the features of the I2C bus are: • Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A 12V supply line (500mA max.) for powering the peripherals often may be present. • Each device connected to the bus is software addressable by a unique address and simple master/ slave relationships exist at all times masters can operate as master-transmitters or as master-receivers. • The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer systems. • Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard mode or up to 400 KBit/s in the fast mode.
標簽： bus bidirectional primarily designed
上傳時間： 2013-12-11
上傳用戶：jeffery
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上傳時間： 2013-12-13
上傳用戶：himbly
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上傳時間： 2014-01-20
上傳用戶：三人用菜
As you have learnt that sleep( )/usleep()/nanosleep() are not good to delay a process. Timers can provide more accurate time control in applications. In this lab, you will explore POSIX timers and signal programming, experience the timer drift. The primary focus of this lab will be "time". The experiment will show you several methods to measure time in your applications.
標簽： nanosleep process Timers learnt
上傳時間： 2013-12-19
上傳用戶：huyiming139
The MEASURE program uses the analog inputs of the P89LPC935 to implement a datalogger. This example shows how you can use signal functions in uVision to simulate a signal coming into one of the analog inputs of the P89LPC935 controller.
標簽： datalogger implement the MEASURE
上傳時間： 2016-12-03
上傳用戶：songrui
The TMS320LF240xA and TMS320LC240xA devices, new members of the TMS320C24x generation of digital signal processor (DSP) controllers, are part of the TMS320C2000 platform of fixed-point DSPs. The 240xA devices offer the enhanced TMS320 DSP architectural design of the C2xx core CPU for low-cost, low-power, and high-performance processing capabilities. Several advanced peripherals, optimized for digital motor and motion control applications, have been integrated to provide a true single-chip DSP controller. While code-compatible with the existing C24x DSP controller devices, the 240xA offers increased processing performance (40 MIPS) and a higher level of peripheral integration. See the TMS320x240xA Device Summary section for device-specific features.
標簽： TMS 320 generation 240
上傳時間： 2013-12-16
上傳用戶：GavinNeko
This tutorial white-paper illustrates practical aspects of FIR filter design and fixed-point implementation along with the algorithms available in the Filter Design Toolbox and the Signal Processing Toolbox for this purpose.
標簽： illustrates fixed-point white-paper practical
上傳時間： 2016-12-14
上傳用戶：15071087253
信號量也稱為信號鎖，主要應用于進程間的同步和互斥，在用于互斥時，通常作為資源鎖。信號量通常通過兩個原子操作wait(P)和signal(V)來訪問。wait操作使信號量的值+1，signal操作使信號量的值-1。本程序模擬了操作系統(tǒng)的pv操作
上傳時間： 2016-12-25
上傳用戶：jjj0202
The exercise should be finished in English. 2. According to Prof. Zhang s requirement, this exercise mainly focuses on the BER performance of some wireless communication system using specific coding and modulation type through the AWGN channel. Signal-to-Noise ration (SNR) varies from 5dB to 20dB.
標簽： requirement According exercise finished
上傳時間： 2014-01-06
上傳用戶：zhangyigenius
