》(NI.Vision.Development.module)[ISO]》(NI.Vision.Development.module)[ffffffffISO]
標簽： Development module Vision ffffffffISO
上傳時間： 2013-12-09
上傳用戶：jcljkh
ECSHOP module for themes
上傳時間： 2013-12-01
上傳用戶：manking0408
Telit GSM module GE863 Pro datasheet
標簽： datasheet module Telit GSM
上傳時間： 2014-01-09
上傳用戶：宋桃子
Telit GSM module GE863-PRO Hardware User Guide in English
標簽： Hardware English module Telit
上傳時間： 2014-01-10
上傳用戶：chenxichenyue
it is programed on dsk6455,and it describe the use of the LED module of the the dsk6455 Board Support Library.
上傳時間： 2016-10-16
上傳用戶：xuanchangri
本程式整合NIST module並且參考 QOS架構完成,使用NS2.33可以模擬,有興趣可以與我討論
上傳時間： 2016-10-21
上傳用戶：thesk123
A module-based Wireless Node (MW-Node) is a Node with wireless and mobile capabilities added by means of modules. It is not a new node object derived from Node. Rather it is a new layout of mostly existing components. Rationale for this new design has been presented in [1]. The MW-Node provides a flexible support for wireless and mobile networking and in particular: support for multiple interfaces/multiple channels, and a common basis for the implementation of wireless routing protocols.
標簽： Node module-based capabilities Wireless
上傳時間： 2013-12-26
上傳用戶：大三三
Four Sample Applications for the KS57-Series Basic Timer module
標簽： Applications Sample module Series
上傳時間： 2016-11-01
上傳用戶：aeiouetla
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上傳時間： 2013-12-13
上傳用戶：himbly
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
上傳時間： 2014-01-20
上傳用戶：三人用菜
