對講機常用術語 對講機, 術語 [watermark] 監聽（monitor） 為接受弱小信號而采用的一種收聽方式。
上傳時間： 2013-11-21
上傳用戶：
嵌入式系統是一種應用范圍非常廣泛的系統。可以說除了桌面計算機和服務器外所有計算設備都屬于嵌入式系統，例如從便攜式音樂播放器到航天飛機上的實時系統控制都屬于嵌入式系統。 大多數商用的嵌入式系統都設計成專用任務的低成本的產品。大多數的嵌入式系統都具有實時性的要求。有些功能需要非常快的主頻，但其他大多數功能并不需要高速的處理能力。這些系統通過特定的器件和軟件來滿足實時性的要求。 簡單地通過速度和成本來定義嵌入式系統是困難的，但對于大批量的產品而言，成本常常對系統設計起決定作用。通常，一個嵌入式系統的很多部分相對系統主要功能來說需要較低的性能，因此嵌入式系統和通用PC相比，能夠使用一個滿足輔助功能的合適的CPU，從而簡化了系統設計，降低了成本。例如，數字電視的機頂盒需要處理每秒以百萬兆位計的連續數據，但這些數據處理大部分是由定制的硬件來實現的，如解析、管理和編解碼多個頻道的數字影像。 對于大批量生產的嵌入式系統，如便攜式音樂播放器或手機等，降低成本就成為最主要的問題。這些系統通常只具有幾個芯片：一個高度集成的CPU，一個定制的芯片用于控制其他所有的功能，還有一個存儲芯片。在這種設計中，每部分都設計成使用最小的系統功耗。 對于小批量的嵌入式應用，為了降低開發成本，常常使用PC體系結構，通過限制程序的執行時間或用一個實時操作系統來替換原先的操作系統。在這種情況下，可以使用一個或多個高性能的CPU來替換特殊用途的硬件。 嵌入式系統的軟件通常運行在有限的硬件資源上：沒有硬盤、操作系統、鍵盤或屏幕。軟件一般都沒有文件系統，如果有的話，也會采用Flash驅動器。如果有人機交互接口的話，也是一個小鍵盤或液晶顯示器。硬件是計算機的物理部分，和存儲在硬件中的計算機軟件程序和數據區分開來。 嵌入到機械中的嵌入式系統需要長期無故障連續運行，因此它的軟件需要比PC中的軟件更加仔細地開發和更加嚴格地測試。 那么，到底什么是嵌入式系統呢？ 根據IEEE（國際電氣和電子工程師協會）的定義，嵌入式系統是“控制、監視或者輔助設備、機器和車間運行的裝置”（原文為devices used to control，monitor，or assist the operation of equipment，machinery or plants）。這主要是從應用上加以定義的，從中可以看出嵌入式系統是軟件和硬件的綜合體，還可以涵蓋機械等附屬裝置。 目前國內一個普遍被認同的定義是：以應用為中心、以計算機技術為基礎，軟件 硬件可裁剪，適應應用系統對功能、可靠性、成本、體積、功耗嚴格要求的專用計算機系統。 可以這樣認為，嵌入式系統是一種專用的計算機系統，作為裝置或設備的一部分。通常，嵌入式系統是一個控制程序存儲在ROM中的嵌入式處理器控制板。事實上，所有帶有數字接口的設備，如手表、微波爐、錄像機、汽車等，都使用嵌入式系統，有些嵌入式系統還包含操作系統，但大多數嵌入式系統都是由單個程序實現整個控制邏輯。 本書是按照人事部、信息產業部全國計算機技術與軟件專業技術資格（水平）考試要求編寫，內容緊扣《嵌入式系統設計考試大鋼》。全書共六章，分別對嵌入式系統基礎知識、嵌入式微處理器與接口設計、嵌入式軟件與操作系統、嵌入式軟件程序設計、嵌入式系統設計與維護等知識進行了詳細的講解。最后介紹了一個典型的嵌入式系統設計案例。 本書內容豐富，結構合理，概念清晰。既可作為全國計算機技術與軟件專業技術資格（水平）考試中嵌入式系統設計師級別的考試用書，供有關考生學習使用，也可作為本科生嵌入式系統相關課程教材或培訓書使用。
上傳時間： 2013-10-29
上傳用戶：dongqiangqiang
6小時學會labview, labview Six Hour Course – Instructor Notes This zip file contains material designed to give students a working knowledge of labview in a 6 hour timeframe. The contents are: Instructor Notes.doc – this document. labviewIntroduction-SixHour.ppt – a PowerPoint presentation containing screenshots and notes on the topics covered by the course. Convert C to F (Ex1).vi – Exercise 1 solution VI. Convert C to F (Ex2).vi – Exercise 2 solution subVI. Thermometer-DAQ (Ex2).vi – Exercise 2 solution VI. Temperature monitor (Ex3).vi – Exercise 3 solution VI. Thermometer (Ex4).vi – Exercise 4 solution subVI. Convert C to F (Ex4).vi – Exercise 4 solution subVI. Temperature Logger (Ex4).vi – Exercise 4 solution VI. Multiplot Graph (Ex5).vi – Exercise 5 solution VI. Square Root (Ex6).vi – Exercise 6 solution VI. State Machine 1 (Ex7).vi – Exercise 7 solution VI. The slides can be presented in two three hour labs, or six one hour lectures. Depending on the time and resources available in class, you can choose whether to assign the exercises as homework or to be done in class. If you decide to assign the exercises in class, it is best to assign them in order with the presentation. This way the students can create VI’s while the relevant information is still fresh. The notes associated with the exercise slide should be sufficient to guide the students to a solution. The solution files included are one possible solution, but by no means the only solution.
標簽： labview
上傳時間： 2013-10-13
上傳用戶：zjwangyichao
Abstract: Most hand-held products lack accurate battery-charge monitors ("fuel gauges") because of the misconception that an accurate fuel gauge is difficult to achieve. This article debunks the myths and discusses how to accurately monitor charge at all temperatures, charge and discharge rates, and aging conditions. 無線通信和數據在新一代手機和PDA中的融合為再一次的生產力飛躍創造了條件。。隨之而來的將是經濟的增長和全新的工作方式，在便攜式計算機領域，PC筆記本曾經扮演了類似的開拓者角角。
上傳時間： 2013-10-17
上傳用戶：erkuizhang
Abstract: Most hand-held products lack accurate battery-charge monitors ("fuel gauges") because of the misconception that an accurate fuel gauge is difficult to achieve. This article debunks the myths and discusses how to accurately monitor charge at all temperatures, charge and discharge rates, and aging conditions.
上傳時間： 2014-03-18
上傳用戶：wenwiang
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上傳時間： 2013-11-23
上傳用戶：shen_dafa
SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others in an architecture where the part is externally programmed?
上傳時間： 2013-10-20
上傳用戶：磊子226
Altera recommends the following system configuration: * Pentium II 400 with 512-MB system memory (faster systems give better software performance) * SVGA monitor * CD-ROM drive * One or more of the following I/O ports: - USB port (if using Windows XP or Windows 2000) for USB-Blaster(TM) or MasterBlaster(TM) communications cables, or APU programming unit - Parallel port for ByteBlasterMV(TM) or ByteBlaster(TM) II download cables - Serial port for MasterBlaster communications cable * TCP/IP networking protocol installed * Windows 2000, Windows NT 4.0 with Service Pack 3 or later, or Windows XP * Internet Explorer 5.0 or later Memory & Disk Space Requirements USB開發
標簽： system configuration recommends following
上傳時間： 2015-03-27
上傳用戶：13188549192
This project is created using the Keil ARM CA Compiler. The Logic Analyzer built into the simulator may be used to monitor and display any variable or peripheral I/O register. It is already configured to show the PWM output signal on PORT3.0 and PORT3.1 This ARM Example may be debugged using only the uVision Simulator and your PC--no additional hardware or evaluation boards are required. The Simulator provides cycle-accurate simulation of all on-chip peripherals of the ADuC7000 device series. You may create various input signals like digital pulses, sine waves, sawtooth waves, and square waves using signal functions which you write in C. Signal functions run in the background in the simulator within timing constraints you configure. In this example, several signal functions are defined in the included Startup_SIM.INI file.
標簽： the Analyzer Compiler project
上傳時間： 2013-12-19
上傳用戶：Yukiseop
Displays CPU time usage, the list of processes (can be terminated) and the task which are running (can be close or switch to). Plus a little net traffic monitor and a disk status report.
標簽： terminated the processes Displays
上傳時間： 2013-12-25
上傳用戶：zgu489
