Produce Java classes to calculate and display the Poisson probability when input the value of the average (A) arrival rate of customers at some business in the range of 1 to 10. The error message will output when A is out of the range。
標(biāo)簽： the probability calculate Produce
上傳時(shí)間： 2014-01-10
上傳用戶：moerwang
DDR SDRAM控制器的VHDL源代碼，含詳細(xì)設(shè)計(jì)文檔。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides the required Delay Locked Loop (DLL), Digital Phase Shift (DPS), and Digital Frequency Synthesis (DFS) functions. This application note describes a controller design for a 16-bit DDR SDRAM. The application note and reference design are enhanced versions of XAPP200 targeted to the Virtex-II series of FPGAs. At a clock rate of 133 MHz, 16-bit data changes at both clock edges. The reference design is fully synthesizable and achieves 133 MHz performance with automatic place and route tools.
上傳時(shí)間： 2014-11-01
上傳用戶：l254587896
* Lightweight backpropagation neural network. * This a lightweight library implementating a neural network for use * in C and C++ programs. It is intended for use in applications that * just happen to need a simply neural network and do not want to use * needlessly complex neural network libraries. It features multilayer * feedforward perceptron neural networks, sigmoidal activation function * with bias, backpropagation training with settable learning rate and * momentum, and backpropagation training in batches.
標(biāo)簽： backpropagation implementating Lightweight lightweight
上傳時(shí)間： 2013-12-27
上傳用戶：清風(fēng)冷雨
Process a binary data stream using a communication system that consists of a baseband modulator, channel, and demodulator. Compute the system s bit error rate (BER). Also, display the transmitted and received signals in a scatter plot.
標(biāo)簽： communication modulator baseband consists
上傳時(shí)間： 2017-01-08
上傳用戶：ardager
The software is capable to simulate space time code [1] for QPSK modulation using different number of state. Examples of generator matrix up to 256 stetes are provided. Variable signal to noise ratio (SNR) might be applied to produce bit error rate (BER) or frame error rate (FER) curves.
標(biāo)簽： modulation different software simulate
上傳時(shí)間： 2014-01-22
上傳用戶：qq1604324866
Introduction Matlab is an ideal tool for simulating digital communications systems, thanks to its easy scripting language and excellent data visualization capabilities. One of the most frequent simulation tasks in the field of digital communications is bit-error- rate testing of modems. The bit-error-rate performance of a receiver is a figure of merit that allows different designs to be compared in a fair manner. Performing bit-error-rate testing withMatlab is very simple, but does require some prerequisite knowledge.
標(biāo)簽： communications Introduction simulating digital
上傳時(shí)間： 2017-03-20
上傳用戶：as275944189
A combined space鈥搕ime block coding (STBC) and eigen-space tracking (EST) scheme in multiple-input-multiple-output systems is proposed. It is proved that the STBC-EST is capable of shifting hardware complexity from the receiver to the transmitter without any bit error rate (BER) performance loss. A computation efficient EST algorithm is also proposed, which makes the STBC-EST affordable. Simulation results show that the STBC-EST with a modest feedback requirement results in a negligible BER performance loss compared with a dual system configuration.
標(biāo)簽： multiple-input-m eigen-space combined tracking
上傳時(shí)間： 2014-01-13
上傳用戶：磊子226
The future satellite communication systems are re- quired to support the higher transmission data rate for providing the multimedia services by employing the e鏗僣ient modulation method such as multi-level QAM.
標(biāo)簽： communication transmission satellite systems
上傳時(shí)間： 2017-04-18
上傳用戶：busterman
This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288). Image resolution is not limited. It takes an RGB input (row-wise) and outputs to a memory the compressed JPEG image. Its quality is comparable to software solutions.
標(biāo)簽： Compressor Hardware Baseline features
上傳時(shí)間： 2017-04-21
上傳用戶：wyc199288
Software uart using a general purpose io and an external interrupt pin of an atmel uc. half duplex operation, adjustable baud rate
標(biāo)簽： interrupt Software external general
上傳時(shí)間： 2013-12-31
上傳用戶：zhangyigenius
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