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processors

  • A very small 250-line library (written entirely in MATLAB) that allows multiple MATLAB programs to t

    A very small 250-line library (written entirely in MATLAB) that allows multiple MATLAB programs to talk to each other, so that hundreds of processors can work together.

    標簽: MATLAB entirely multiple programs

    上傳時間: 2015-04-03

    上傳用戶:nanshan

  • CBC下寫的串口編程

    CBC下寫的串口編程,API函數實例 I wish this site had been around when I was trying to figure out how to make serial communications work in Windows95. I, like many programmers, was hit with the double-whammy of having to learn Windows programming and Win95 serial comm programming at the same time. I found both tasks confusing at best. It was particularly frustrating because I had, over the years, written so much stuff (including lots of serial comm software) for the DOS environment and numerous embedded applications. Interrupt driven serial comm, DMA transfer serial comm, TSR serial comm, C, assembler, various processors... you name it, it had written it. Yet, everything I knew seemed upside-down in the message-driven-callback world of Windows.

    標簽: CBC 串口編程

    上傳時間: 2014-06-20

    上傳用戶:cccole0605

  • The Intel® JPEG Library provides a set of highly optimized C functions that implement JPEG compre

    The Intel® JPEG Library provides a set of highly optimized C functions that implement JPEG compression and decompression on Intel architecture processors

    標簽: JPEG functions implement optimized

    上傳時間: 2015-08-17

    上傳用戶:chenjjer

  • RTX-51 is a runtime library that, together with C51, allows real-time systems to be implemented for

    RTX-51 is a runtime library that, together with C51, allows real-time systems to be implemented for all processors of the 8051 family (e.g., 8051, 8052, 80515, etc.), except for the 8?C751 and 8?C752. RTX-251 extends the functionality of the RTX-51 to the new intel MCSÒ 251 family of processors. It is available as a set of runtime libraries supporting the binary and the source mode to be used with the C251.

    標簽: implemented real-time together runtime

    上傳時間: 2013-12-13

    上傳用戶:refent

  • The ability to write efficient, high-speed arithmetic routines ultimately depends upon your knowled

    The ability to write efficient, high-speed arithmetic routines ultimately depends upon your knowledge of the elements of arithmetic as they exist on a computer. That conclusion and this book are the result of a long and frustrating search for information on writing arithmetic routines for real-time embedded systems. With instruction cycle times coming down and clock rates going up, it would seem that speed is not a problem in writing fast routines. In addition, math coprocessors are becoming more popular and less expensive than ever before and are readily available. These factors make arithmetic easier and faster to use and implement. However, for many of you the systems that you are working on do not include the latest chips or the faster processors. Some of the most widely used microcontrollers used today are not Digital Signal processors (DSP), but simple eight-bit controllers such as the Intel 8051 or 8048 microprocessors.

    標簽: arithmetic high-speed ultimately efficient

    上傳時間: 2014-11-30

    上傳用戶:lizhen9880

  • This document is an operation guide for the MPC8XXFADS board. It contains operational, functional a

    This document is an operation guide for the MPC8XXFADS board. It contains operational, functional and general information about the FADS. The MPC8XXFADS is meant to serve as a platform for s/ w and h/w development around the MPC8XX family processors. Using its on-board resources and its associated debugger, a developer is able to download his code, run it, set breakpoints, display memory and registers and connect his own proprietary h/w via the expansion connectors, to be incorporated to a desired system with the MPC8XX processor.

    標簽: operational MPC8XXFADS functional operation

    上傳時間: 2014-03-10

    上傳用戶:zsjinju

  • The IA-32 Intel Architecture Software Developer’s Manual, Volume 1: Basic Architecture (Order Numbe

    The IA-32 Intel Architecture Software Developer’s Manual, Volume 1: Basic Architecture (Order Number 245470) is part of a three-volume set that describes the architecture and programming environment of all IA-32 Intel Architecture processors.

    標簽: Architecture Developer Software Manual

    上傳時間: 2016-04-08

    上傳用戶:妄想演繹師

  • The IA-32 Intel Architecture Software Developer’s Manual, Volume 2: Instruction Set Reference (Orde

    The IA-32 Intel Architecture Software Developer’s Manual, Volume 2: Instruction Set Reference (Order Number 245471) is part of a three-volume set that describes the architecture and programming environment of all IA-32 Intel® Architecture processors. the IA-32 Intel Architecture Software Developer’s Manual, Volume 2, describes the instructions set of the processor and the opcode structure. These two volumes are aimed at application programmers who are writing programs to run under existing operating systems or executives.

    標簽: Architecture Instruction Developer Reference

    上傳時間: 2013-12-15

    上傳用戶:xsnjzljj

  • The IA-32 Software Developer’s Manual, Volume 3: System Programming Guide (Order Number 245472), is

    The IA-32 Software Developer’s Manual, Volume 3: System Programming Guide (Order Number 245472), is part of a three-volume set that describes the architecture and programming environment of all IA-32 Intel® Architecture processors. The IA-32 Software Developer’s Manual, Volume 3, describes the operating-system support environment of an IA-32 processor, including memory management, protection, task management, interrupt and exception handling, and system management mode. It also provides IA-32 processor compatibility information. This volume is aimed at operating- system and BIOS designers and programmers.

    標簽: Programming Developer Software 245472

    上傳時間: 2013-12-23

    上傳用戶:小碼農lz

  • The TMS320C54x, TMS320LC54x, and TMS320VC54x fixed-point, digital signal processor (DSP) families (

    The TMS320C54x, TMS320LC54x, and TMS320VC54x fixed-point, digital signal processor (DSP) families (hereafter referred to as the ’54x unless otherwise specified) are based on an advanced modified Harvard architecture that has one program memory bus and three data memory buses. These processors also provide an arithmetic logic unit (ALU) that has a high degree of parallelism, application-specific hardware logic, on-chip memory, and additional on-chip peripherals. These DSP families also provide a highly specialized instruction set, which is the basis of the operational flexibility and speed of these DSPs.

    標簽: TMS 320 fixed-point processor

    上傳時間: 2013-12-27

    上傳用戶:宋桃子

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