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  • 板級光互連協議研究與FPGA實現

    隨著集成電路頻率的提高和多核時代的到來,傳統的高速電互連技術面臨著越來越嚴重的瓶頸問題,而高速下的光互連具有電互連無法比擬的優勢,成為未來電互連的理想替代者,也成為科學研究的熱點問題。目前,由OIF(Optical Intemetworking Forum,光網絡論壇)論壇提出的甚短距離光互連協議,主要面向主干網,其延遲、功耗、兼容性等都不能滿足板間、芯片間光互連的需要,因此,研究定制一種適用于板級、芯片級的光互連協議具有非常重要的研究意義。 本論文將協議功能分為數據鏈路層和物理層來設計,鏈路層功能包括了協議原語設計,數據幀格式和數據傳輸流程設計,流量控制機制設計,協議通道初始化設計,錯誤檢測機制設計和空閑字符產生、時鐘補償方式設計;物理層功能包含了數據的串化和解串功能,多通道情況下的綁定功能,數據編解碼功能等。 然后,文章采用FPGA(Field Programmable Gate Array,現場可編程門陣列)技術實現了定制協議的單通道模式。重點是數據鏈路層的實現,物理層采用定制具備其功能的IP(Intellectual property,知識產權)——RocketIO來實現。實現的過程中,采用了Xilinx公司的ISE(Integrated System Environment,集成開發環境)開發流程,使用的設計工具包括:ISE,ModelSim,Synplify Pro,ChipScope等。 最后,本文對實現的協議進行了軟件仿真和上扳測試,訪真和測試結果表明,實現的單通道模式,支持的最高串行頻率達到3.5GHz,完全滿足了光互連驗證系統初期的要求,同時由RocketIO的高速串行差分口得到的眼圖質量良好,表明對物理層IP的定制是成功的。

    標簽: FPGA 板級 光互連 協議研究

    上傳時間: 2013-06-28

    上傳用戶:guh000

  • PCI ExpressTM Architecture

    PCI ExpressTM Architecture Add-in Card Compliance Checklist for the PCI Express Base 1.0a SpecificationThe PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.Contact the PCI Special Interest Group office to obtain the latest revision of this checklistQuestions regarding the ths document or membership in the PCI Special Interest Group may be forwarded tPCI Special Interest Group5440 SW Westgate Drive #217Portland, OR 97221Phone: 503-291-2569Fax: 503-297-1090 DISCLAIMERThis document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample.  The PCI SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification.  No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.

    標簽: Architecture ExpressTM PCI

    上傳時間: 2013-11-03

    上傳用戶:gy592333

  • Stellaris(群星)單片機的片上FLASH編程(英)

    Stellaris(群星)單片機的片上FLASH編程(英) INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH LUMINARY MICRO PRODUCTS. NO LICENSE,EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL property RIGHTS IS GRANTED BY THISDOCUMENT. EXCEPT AS PROVIDED IN LUMINARY MICRO’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS,LUMINARY MICRO ASSUMES NO LIABILITY WHATSOEVER, AND LUMINARY MICRO DISCLAIMS ANY EXPRESS OR IMPLIEDWARRANTY, RELATING TO SALE AND/OR USE OF LUMINARY MICRO’S PRODUCTS INCLUDING LIABILITY OR WARRANTIESRELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHTOR OTHER INTELLECTUAL property RIGHT. LUMINARY MICRO’S PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL,LIFE SAVING, OR LIFE-SUSTAINING APPLICATIONS.

    標簽: Stellaris FLASH 單片機 編程

    上傳時間: 2013-10-22

    上傳用戶:JamesB

  • Stellaris(群星)單片機加上32KB串行SRAM(英

    Stellaris(群星)單片機加上32KB串行SRAM(英) INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH LUMINARY MICRO PRODUCTS. NO LICENSE,EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL property RIGHTS IS GRANTED BY THISDOCUMENT. EXCEPT AS PROVIDED IN LUMINARY MICRO’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS,LUMINARY MICRO ASSUMES NO LIABILITY WHATSOEVER, AND LUMINARY MICRO DISCLAIMS ANY EXPRESS OR IMPLIEDWARRANTY, RELATING TO SALE AND/OR USE OF LUMINARY MICRO’S PRODUCTS INCLUDING LIABILITY OR WARRANTIESRELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHTOR OTHER INTELLECTUAL property RIGHT. LUMINARY MICRO’S PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL,LIFE SAVING, OR LIFE-SUSTAINING APPLICATIONS.

    標簽: Stellaris SRAM 32 KB

    上傳時間: 2013-11-22

    上傳用戶:lixqiang

  • UART測試程序-AT91SAM9260

    UART測試程序-AT91SAM9260://* The software is delivered "AS IS" without warranty or condition of any//* kind, either express, implied or statutory. This includes without//* limitation any warranty or condition with respect to merchantability or//* fitness for any particular purpose, or against the infringements of//* intellectual property rights of others.

    標簽: UART 9260 SAM AT

    上傳時間: 2013-11-18

    上傳用戶:yepeng139

  • wp379 AXI4即插即用IP

    In the past decade, the size and complexity of manyFPGA designs exceeds the time and resourcesavailable to most design teams, making the use andreuse of Intellectual property (IP) imperative.However, integrating numerous IP blocks acquiredfrom both internal and external sources can be adaunting challenge that often extends, rather thanshortens, design time. As today's designs integrateincreasing amounts of functionality, it is vital thatdesigners have access to proven, up-to-date IP fromreliable sources.

    標簽: AXI4 379 wp 即插即用

    上傳時間: 2013-11-15

    上傳用戶:lyy1234

  • PLD對FPGA數據加密

    SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others in an architecture where the part is externally programmed?

    標簽: FPGA PLD 數據加密

    上傳時間: 2013-11-06

    上傳用戶:wl9454

  • Cadence_16.6_OrCAD_Capture_CIS_新功能 連載(二)

    今天我要和大家說的是capture 在查找和替換上做出的一些更新。在以前的版本中,我們只能查找一些和property values 相對應的內容。16.6 版本可以允許通過標準語法的表達式來查找更多的內容。同時也在查找窗口下加了2 個菜單。

    標簽: OrCAD_Capture_CIS Cadence 16.6 新功能

    上傳時間: 2013-10-18

    上傳用戶:zhaiye

  • Cadence_16.6_OrCAD_Capture_CIS_新功能 連載(二)

    今天我要和大家說的是capture 在查找和替換上做出的一些更新。在以前的版本中,我們只能查找一些和property values 相對應的內容。16.6 版本可以允許通過標準語法的表達式來查找更多的內容。同時也在查找窗口下加了2 個菜單。

    標簽: OrCAD_Capture_CIS Cadence 16.6 新功能

    上傳時間: 2013-10-09

    上傳用戶:cc1015285075

  • wp379 AXI4即插即用IP

    In the past decade, the size and complexity of manyFPGA designs exceeds the time and resourcesavailable to most design teams, making the use andreuse of Intellectual property (IP) imperative.However, integrating numerous IP blocks acquiredfrom both internal and external sources can be adaunting challenge that often extends, rather thanshortens, design time. As today's designs integrateincreasing amounts of functionality, it is vital thatdesigners have access to proven, up-to-date IP fromreliable sources.

    標簽: AXI4 379 wp 即插即用

    上傳時間: 2013-11-11

    上傳用戶:csgcd001

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