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In order to enhance the efficiency and reliability of the power grid, diversify energy
resources, improve power security, and reduce greenhouse gas emission, many
countries have been putting great efforts in designing and constructing their smart
grid(SG) infrastructures.Smart gridcommunicationsnetwork(SGCN) is oneof the
key enabling technologies of the SG. However, a successful implementation of an
efficient and cost-effective SGCN is a challenging task
標(biāo)簽：
smart
grid
上傳時(shí)間：
2020-06-07
上傳用戶：shancjb
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With the continued growth in the world's population, there is a need to ensure availability of
enough food to feed everyone. Advances in science and technology have helped not only to
increase food production, but also to reduce food wastage. However, the latter has the
potential to be improved to a significant extent through appropriate matching of supply and
demand, and with proper handling during storage and transit. Given the amount of food
wastage that occurs after a food item leaves the “farm” on its way to the “fork,” and the
availability of means to reduce such wastage, there really is no excuse for feigned ignorance.
標(biāo)簽：
Automation
Industry
Network
Sensor
RFID
Food
and
the
in
上傳時(shí)間：
2020-06-08
上傳用戶：shancjb
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Current field forecast verification measures are inadequate, primarily because they compress the comparison
between two complex spatial field processes into one number. Discrete wavelet transforms (DWTs) applied to
analysis and contemporaneous forecast fields prove to be an insightful approach to verification problems. DWTs
allow both filtering and compact physically interpretable partitioning of fields. These techniques are used to
reduce or eliminate noise in the verification process and develop multivariate measures of field forecasting
performance that are shown to improve upon existing verification procedures.
標(biāo)簽：
field forecast verification
上傳時(shí)間：
2020-07-22
上傳用戶：
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This design uses Common-Emitter Amplifier (Class A) with 2N3904 Bipolar Junction Transistor.
Use “Voltage Divider Biasing” to reduce the effects of varying β (= ic / ib) (by holding the Base voltage constant)
Base Voltage (Vb) = Vcc * [R2 / (R1 + R2)]
Use Coupling Capacitors to separate the AC signals from the DC biasing voltage (which only pass AC signals and block any DC component).
Use Bypass Capacitor to maintain the Q-point stability.
To determine the value of each component, first set Q-point close to the center position of the load line. (RL is the resistance of the speaker.)
標(biāo)簽：
音頻放大器設(shè)計(jì)
電路圖
英文
上傳時(shí)間：
2020-11-27
上傳用戶：
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This paper presents a new type of electromagnetic damper with rotating inertial mass that has been devel
oped to control the vibrations of structures subjected to earthquakes. The electromagnetic inertial mass
damper (EIMD) consists of a ball screw that converts axial oscillation of the rod end into rotational motion
of the internal flflywheel and an electric generator that is turned by the rotation of the inner rod. The EIMD is
able to generate a large inertial force created by the rotating flflywheel and a variable damping force devel
oped by the electric generator. Device performance tests of reduced-scale and full-scale EIMDs were under
taken to verify the basic characteristics of the damper and the validity of the derived theoretical formulae.
Shaking table tests of a three-story structure with EIMDs and earthquake response analyses of a building
with EIMDs were conducted to demonstrate the seismic response control performance of the EIMD. The
EIMD is able to reduce story drifts as well as accelerations and surpasses conventional types of dampers
in reducing acceleration responses.
標(biāo)簽：
electromagnetic
response
Seismic
control
using
上傳時(shí)間：
2021-11-04
上傳用戶：a1293065
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The PW5300 is a current mode boost DC-DC converter. Its PWM circuitry with built-in 0.2? powerMOSFET make this regulator highly power efficient. The internal compensation network alsominimizes as much as 6 external component counts. The non-inverting input of error amplifierconnects to a 0.6V precision reference voltage and internal soft-start function can reduce the inrushcurrent. The PW5300 is available in the SOT23-6L package and provides space-saving PCB for theapplication fields
標(biāo)簽：
pw5300
上傳時(shí)間：
2022-02-11
上傳用戶：jiabin
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The PW2202 is silicon N-channel Enhanced VDMOSFETs, is obtained by the self-aligned planarTechnology which reduce the conduction loss, improve switching performance and enhance theavalanche energy. The transistor can be used in various power switching circuit for system
標(biāo)簽：
pw2202
上傳時(shí)間：
2022-02-11
上傳用戶：默默
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PW1555 is a programmable current limit switch with input voltage range selection and outputvoltage clamping. Extremely low RDS(ON) of the integrated protection N-channel FET helps toreduce power loss during the normal operation. Programmable soft-start time controls the slew rateof the output voltage during the start-up time. Independent enable control allows the complicatedsystem sequencing control. It integrates the over-temperature protection shutdown andautorecovery with hystersis
標(biāo)簽：
pw1555
上傳時(shí)間：
2022-02-14
上傳用戶：
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Single chip TFT-LCD Controller/Driver with On-chip Frame Memory (FM) Display Resolution: 240*RGB (H) *320(V) Frame Memory Size: 240 x 320 x 18-bit = 1,382,400 bits LCD Driver Output Circuits- Source Outputs: 240 RGB Channels- Gate Outputs: 320 Channels- Common Electrode Output Display Colors (Color Mode)- Full Color: 262K, RGB=(666) max., Idle Mode Off- Color reduce: 8-color, RGB=(111), Idle Mode On Programmable Pixel Color Format (Color Depth) for Various Display Data input Format- 12-bit/pixel: RGB=(444)- 16-bit/pixel: RGB=(565)- 18-bit/pixel: RGB=(666) MCU Interface- Parallel 8080-series MCU Interface (8-bit, 9-bit, 16-bit & 18-bit)- 6/16/18 RGB Interface(VSYNC, HSYNC, DOTCLK, ENABLE, DB[17:0])- Serial Peripheral Interface(SPI Interface)- VSYNC Interface
標(biāo)簽：
st7789v
LCD
上傳時(shí)間：
2022-03-04
上傳用戶：
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電學(xué)中的測(cè)量技術(shù)涉及范圍非常廣,電流測(cè)量在電學(xué)計(jì)量中占有非常重要的位置。如何精確地進(jìn)行電流測(cè)量是精密測(cè)量的一大難題。傳統(tǒng)的電流檢測(cè)電路多采用運(yùn)算放大芯片與片外電流檢測(cè)電路相結(jié)合的方式,電路集成度很低,需要較多的接口和資源才能完成對(duì)電路的檢測(cè)。本文把所有電路部分都集成在一塊芯片上,包括檢測(cè)電阻,運(yùn)算放大器電路及模擬轉(zhuǎn)數(shù)字轉(zhuǎn)換電路,從而在電路內(nèi)部可以進(jìn)行電流檢測(cè),使電路更好的集成化。前置電路使用二級(jí)共源共柵結(jié)構(gòu)的運(yùn)算放大器,減小溝道長度調(diào)制效應(yīng)造成的電流誤差。10位SAR ADC中采用電容驅(qū)動(dòng)能力強(qiáng)的傳輸門保證了模數(shù)轉(zhuǎn)化器的有效精度。比較器模塊采用再生鎖存器與遲滯比較器作為基礎(chǔ)單元組合解決精密測(cè)量的問題。本設(shè)計(jì)可以作為嵌入芯片內(nèi)的一小部分而檢測(cè)芯片中的微小電流1mA~100mA,工作電壓在1.8v左右,電流檢測(cè)精度預(yù)期達(dá)到10uA的需求。The measurement technology in electricity involves a wide range,and current measurement plays a very important position in electrical measurement.How to accurately measure current is a big problem in precision measurement. The traditional current detecting circuit adopts the combination of the operational amplifier chip and theoff-chip current detecting circuit, The circuit integration is very low, and more interfaces and resources are needed tocomplete the circuit detection.This topic integrates all the circuit parts into one chip, including detection resistance, operational amplifier circuit andanalog to digital conversion circuit. Highly integrated circuit makes the external resources on the chip more intensive,so that current detection can be carried out inside the circuit, so that the circuit can be better integrated. Thefront-end circuit of this project uses two-stage cascade operational amplifier and cascade tube to reduce the currenterror caused by channel length modulation effect. In 10-bit SAR ADC, the transmission gate with strong capacitivedriving ability ensures the effective accuracy of the analog-to-digital converter. Comparator module uses regenerativelatch and hysteresis comparator as basic unit to solve the difficult problem of precision measurement. This topic can beused as a small part of the embedded chip to detect the micro-current in the chip 1 mA~100 mA, the working voltageis about 1.8v, and the current detection accuracy is expected to reach the requirement of 10 uA.
標(biāo)簽：
電流檢測(cè)
電路
運(yùn)算放大器
adc
上傳時(shí)間：
2022-04-03
上傳用戶：
