Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read and Write cycles, 8-bit Memory Read/Write cycles, DMA cycles, and up to 32-bit Firmware memory read/write cycles. Serial IRQ support is also provided.
None of this has been tested (yet) with a third-party LPC Peripheral or Host.
-- Hamming Decoder
-- This Hamming decoder accepts an 8-bit Hamming code (produced by the encoder above) and performs single error correction and double error detection.
-- download from: www.pld.com.cn & www.fpga.com.cn
LIBRARY ieee
USE ieee.std_logic_1164.ALL
ENTITY hamdec IS
PORT(hamin : IN BIT_VECTOR(0 TO 7) --d0 d1 d2 d3 p0 p1 p2 p4
dataout : OUT BIT_VECTOR(0 TO 3) --d0 d1 d2 d3
sec, ded, ne : OUT BIT) --diagnostic outputs
END hamdec
ARCHITECTURE ver1 OF hamdec IS
BEGIN
