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response

response是一個(gè)計(jì)算機(jī)專(zhuān)業(yè)術(shù)語(yǔ)。
  • 100-15V TO 12V DCDC 原理圖 PCB BOM表

    高的工作電壓高達(dá)100V N雙N溝道MOSFET同步驅(qū)動(dòng) The D810DCDC is a synchronous step-down switching regulator controller that can directly step-down voltages from up to 100V, making it ideal for telecom and automotive applications. The D810DCDC uses a constant on-time valley current control architecture to deliver very low duty cycles with accurate cycle-by-cycle current limit, without requiring a sense resistor. A precise internal reference provides 0.5% DC accuracy. A high bandwidth (25MHz) error amplifi er provides very fast line and load transient response. Large 1Ω gate drivers allow the D810DCDC to drive multiple MOSFETs for higher current applications. The operating frequency is selected by an external resistor and is compensated for variations in VIN and can also be synchronized to an external clock for switching-noise sensitive applications. Integrated bias control generates gate drive power from the input supply during start-up and when an output shortcircuit occurs, with the addition of a small external SOT23 MOSFET. When in regulation, power is derived from the output for higher effi ciency.

    標(biāo)簽: DCDC 100 12V BOM

    上傳時(shí)間: 2013-10-24

    上傳用戶:wd450412225

  • DN1011 簡(jiǎn)單高效率隔離型反激式電源

      While simplicity and high effi ciency (for cool running) areno longer optional features in isolated power supplies, itis traditionally diffi cult to achieve both. Achieving higheffi ciency often requires the use of advanced topologiesand home-brewed secondary synchronous rectifi cationschemes once reserved only for higher power applications.This only adds to the parts count and to the designcomplexity associated with the reference and optocouplercircuits typically used to maintain isolation. Fortunately, abreakthrough IC makes it possible to achieve both high efficiency and simplicity in a synchronous fl yback topology.The LT®3825 simplifi es and improves the performance oflow voltage, high current fl yback supplies by providingprecise synchronous rectifi er timing and eliminating theneed for optocoupler feedback while maintaining excellentregulation and superior loop response.

    標(biāo)簽: 1011 DN 高效率 隔離型

    上傳時(shí)間: 2013-10-16

    上傳用戶:wayne595

  • 具有寬輸入范圍的微型單片降壓型穩(wěn)壓器

      Automotive batteries, industrial power supplies, distributedsupplies and wall transformers are all sources ofwide-ranging high voltage inputs. The easiest way to stepdown these sources is with a high voltage monolithicstep-down regulator that can directly accept a wide inputrange and produce a well-regulated output. The LT®3493accepts inputs from 3.6V to 36V and LT3481 acceptsinputs from 3.6V to 34V. Both provide excellent lineand load regulation and dynamic response. The LT3481offers a high effi ciency solution over a wide load range andkeeps the output ripple low during Burst Mode® operationwhile the LT3493 provides a tiny solution with minimalexternal components. The LT3493 operates at 750kHzand the LT3481 has adjustable frequency from 300kHzto 2.8MHz. High frequency operation enables the use ofsmall, low cost inductors and ceramic capacitors.

    標(biāo)簽: 輸入 降壓型穩(wěn)壓器

    上傳時(shí)間: 2014-12-24

    上傳用戶:Pzj

  • DN457寬輸入電壓范圍同步降壓穩(wěn)壓器

      The LTC®3610 is a high power monolithic synchronousstep-down DC/DC regulator that can deliver up to 12Aof continuous output current from a 4V to 24V (28Vmaximum) input supply. It is a member of a high currentmonolithic regulator family (see Table 1) that featuresintegrated low RDS(ON) N-channel top and bottomMOSFETs. This results in a high effi ciency and highpower density solution with few external components.This regulator family uses a constant on-time valleycurrent mode architecture that is capable of operatingat very low duty cycles at high frequency and with veryfast transient response. All are available in low profi le(0.9mm max) QFN packages.

    標(biāo)簽: 457 DN 同步降壓

    上傳時(shí)間: 2013-11-07

    上傳用戶:moerwang

  • 信號(hào)源,調(diào)節(jié)器和電源電路分析

      Occasionally, we are tasked with designing circuitry for aspecific purpose. The request may have customer originsor it may be an in-house requirement. Alternately, a circuitmay be developed because its possibility is simply tooattractive to ignore1. Over time, these circuits accumulate,encompassing a wide and useful body of proven capabilities.They also represent substantial effort. These considerationsmake publication an almost obligatory propositionand, as such, a group of circuits is presented here. This isnot the first time we have displayed such wares and, giventhe encouraging reader response, it will not be the last2.Eighteen circuits are included in this latest effort, roughlyarranged in the categories given in this publication’s title.They appear at the next paragraph.

    標(biāo)簽: 信號(hào)源 調(diào)節(jié)器 電源 電路分析

    上傳時(shí)間: 2013-11-12

    上傳用戶:012345

  • 高效LCD液晶照明技術(shù)

    In August of 1992 LTC published Application Note 49, “Illumination Circuitry for Liquid Crystal Displays.” One notable aspect of this event is that it generated more response than all previous LTC application notes combined. This level of interest, along with significant performance advances since AN-49’s appearance, justifies further discussion of LCD backlighting circuitry.

    標(biāo)簽: LCD 液晶 照明技術(shù)

    上傳時(shí)間: 2013-11-19

    上傳用戶:lanjisu111

  • I2C slave routines for the 87L

    The 87LPC76X Microcontroller combines in a small package thebenefits of a high-performance microcontroller with on-boardhardware supporting the Inter-Integrated Circuit (I2C) bus interface.The 87LPC76X can be programmed both as an I2C bus master, aslave, or both. An overview of the I2C bus and description of the bussupport hardware in the 87LPC76X microcontrollers appears inapplication note AN464, Using the 87LPC76X Microcontroller as anI2C Bus Master. That application note includes a programmingexample, demonstrating a bus-master code. Here we show anexample of programming the microcontroller as an I2C slave.The code listing demonstrates communications routines for the87LPC76X as a slave on the I2C bus. It compliments the program inAN464 which demonstrates the 87LPC76X as an I2C bus master.One may demonstrate two 87LPC76X devices communicating witheach other on the I2C bus, using the AN464 code in one, and theprogram presented here in the other. The examples presented hereand in AN464 allow the 87LPC76X to be either a master or a slave,but not both. Switching between master and slave roles in amultimaster environment is described in application note AN435.The software for a slave on the bus is relatively simple, as theprocessor plays a relatively passive role. It does not initiate bustransfers on its own, but responds to a master initiating thecommunications. This is true whether the slave receives or transmitsdata—transmission takes place only as a response to a busmaster’s request. The slave does not have to worry about arbitrationor about devices which do not acknowledge their address. As theslave is not supposed to take control of the bus, we do not demandit to resolve bus exceptions or “hangups”. If the bus becomesinactive the processor simply withdraws, not interfering with themaster (or masters) on the bus which should (hopefully) try toresolve the situation.

    標(biāo)簽: routines slave I2C 87L

    上傳時(shí)間: 2013-11-19

    上傳用戶:shirleyYim

  • 基于變頻調(diào)速的水平連鑄機(jī)拉坯輥速度控制系統(tǒng)

    基于變頻調(diào)速的水平連鑄機(jī)拉坯輥速度控制系統(tǒng)Frequency Inverter Based Drawing RollerS peedC ontrolSy stem ofHorizontal Continuous Casting MachineA 偉劉沖旅巴(南 華 大 學(xué)電氣工程學(xué)院,衡陽(yáng)421001)摘要拉坯輥速度控制是水平連鑄工藝的關(guān)鍵技術(shù)之一,采用變頻器實(shí)現(xiàn)水平連鑄機(jī)拉坯輥速度程序控制,由信號(hào)發(fā)生裝置給變頻器提供程控信號(hào)。現(xiàn)場(chǎng)應(yīng)用表明該控制系統(tǒng)速度響應(yīng)快,控制精度高,滿足了水平連鑄生產(chǎn)的需要。關(guān)鍵詞水平連鑄拉坯輥速度程序控制變頻器Absh'act Speedc ontorlof dr awingor leris on eo fth ek eyte chnologiesfo rho rizontalco ntinuousca stingm achine.Fo rth ispu rpose,fr equencyco nverterisad optedfo rdr awingor lersp eedp rogrammablec ontorlof ho rizontalco ntinuousca stingm achine,th ep rogrammableco ntorlsi gnalto fr equencyc onverteris provided場(chǎng)a signal generator. The results of application show that the response of system is rapid and the control accuracy is high enough to meet thedemand of production of horizontal continuous casting.Keywords Horizontalco ntinuousc asting Drawingor ler Speedp rogrammablec ontrol Ferquencyin verter 隨著 現(xiàn) 代 化工業(yè)生產(chǎn)對(duì)鋼材需求量的日益增加,連鑄生產(chǎn)能力已經(jīng)成為衡量一個(gè)國(guó)家冶金工業(yè)發(fā)展水平的重要指標(biāo)之一。近十幾年來(lái),水平連鑄由于具有投資少、鑄坯直、見(jiàn)效快等多方面的優(yōu)點(diǎn),國(guó)內(nèi)許多鋼鐵企業(yè)利用水平連鑄機(jī)來(lái)澆鑄特種合金鋼,發(fā)揮了其獨(dú)特的優(yōu)勢(shì)并取得了較好的經(jīng)濟(jì)效益〔1,2)0采用 水 平 連鑄機(jī)澆鑄特種合金鋼時(shí),由于拉坯機(jī)是水平連鑄系統(tǒng)中的關(guān)鍵設(shè)備之一,拉坯機(jī)及其控制性能的好壞直接影響著連鑄坯的質(zhì)量,因此,連鑄的拉坯技術(shù)便成為整個(gè)水平連鑄技術(shù)的核心。由于鋼的冶煉過(guò)程是在高溫下進(jìn)行的,鋼水溫度的變化又容易影響鑄坯的質(zhì)量和成材率,因此,如何能在高溫環(huán)境下控制好與鑄坯速度相關(guān)的參數(shù)(拉、推程量,中停時(shí)間和拉坯頻率等)對(duì)于確保連鑄作業(yè)的進(jìn)一步高效化,延長(zhǎng)系統(tǒng)的連續(xù)作業(yè)時(shí)間十分關(guān)鍵。因此,拉坯輥速度控制技術(shù)是連鑄生產(chǎn)過(guò)程控制領(lǐng)域中的關(guān)鍵技術(shù)之- [31

    標(biāo)簽: 變頻調(diào)速 水平連鑄機(jī) 速度控制

    上傳時(shí)間: 2013-10-12

    上傳用戶:gxy670166755

  • 線性低壓差 (LDO) 穩(wěn)壓器解決方案

    We offer a broad line of high performance low dropout (LDO) linear regulators with fasttransient response, excellent line and load regulation, and very wide input voltage rangefrom 0.9V to 100V. Output currents range from 20mA to 10A, with positive, negative andmultiple output versions available. Many devices offer output voltage operation <0.8V andsome feature operation as low as 0V, even with a single supply. Most are stable with ceramicoutput capacitors. LDO regulators can be applied in virtually any application.

    標(biāo)簽: LDO 線性 低壓差 穩(wěn)壓器

    上傳時(shí)間: 2013-11-15

    上傳用戶:努力努力再努力

  • XAPP708 -133MHz PCI-X到128MB DDR小型DIMM存儲(chǔ)器橋

      The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Specification Revision 2.0a ([Ref 6]) dictates that when a target signals adata transfer, "the target must do so within 16 clocks of the assertion of FRAME#." PCItermination transactions, such as Split response/Complete, are commonly used to meet thelatency specifications. This method adds complexity to the design, as well as additional systemlatency. Another solution is to increase the ratio of the memory frequency to the PCI-X busfrequency. However, this solution increases the required power and clock resource usage.

    標(biāo)簽: PCI-X XAPP DIMM 708

    上傳時(shí)間: 2013-11-24

    上傳用戶:18707733937

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