User ManualRev. 1.2SmartRF® CC2420DK: Packet Sniffer for IEEE 802.15.4 and ZigBee Table of contents1 INTRODUCTION...............................................................................................31.1 HARDWARE PLATFORM.......................................................................................31.2 SOFTWARE.........................................................................................................32 USER INTERFACE..........................................................................................42.1 MENUS AND TOOLBARS.......................................................................................62.2 SETUP................................................................................................................62.3 SELECT FIELDS...................................................................................................72.3.1 Tips............................................................................................................72.4 PACKET DETAILS.................................................................................................72.5 ADDRESS BOOK..................................................................................................92.5.1 Tips............................................................................................................92.6 DISPLAY FILTER................................................................................................102.7 TIME LINE.........................................................................................................103 HELP....................................................................................................................114 TROUBLESHOOTING..................................................................................125 GENERAL INFORMATION........................................................................135.1 DOCUMENT HISTORY........................................................................................135.2 DISCLAIMER......................................................................................................135.3 TRADEMARKS...................................................................................................136 ADDRESS INFORMATION........................................................................14
標(biāo)簽: 數(shù)據(jù) 分析儀 說明書
上傳時間: 2014-01-14
上傳用戶:zhangyi99104144
MQX最早是Precise Software Technologies公司1989年開發(fā),2009年飛思卡爾收購后,開放源代碼。MQX采用微內(nèi)核結(jié)構(gòu),具有標(biāo)準(zhǔn)的API接口、模塊化架構(gòu)、TCP/IP協(xié)議棧和USB協(xié)議棧等,因此無論在實(shí)時性、裁減性還是移植性上都具有卓越的性能.
標(biāo)簽: MQX 嵌入式 實(shí)時操作系統(tǒng) 內(nèi)核
上傳時間: 2013-12-20
上傳用戶:dysyase
This application note provides step-by-step instructions on how to recreate a Tri-Mode Ethernet(TEMAC) performance testing system using the ML405 board and MontaVista Linux 4.0. Thisapplication note shows how to set up a simple EDK Base System Builder system on the ML405Evaluation Platform and run performance tests. The network architecture for the test isdescribed. A system is built and downloaded into the FPGA. A MontaVista Linux kernel isconfigured, built, and downloaded into the ML405 Evaluation Platform. The instructions forobtaining and setting up the software used to perform the measurements, netperf, are given.
標(biāo)簽: Virtex TEMAC XAPP 1023
上傳時間: 2013-11-11
上傳用戶:saharawalker
This is the Xilinx Dual Processor Reference Designs suite. The designs illustrate a few differentdual-core architectures based on the MicroBlaze™ and PowerPC™ processors. The designsillustrate various concepts described in the Xilinx White Paper WP262 titled, “DesigningMultiprocessor Systems in Platform Studio”. There are simple software applications includedwith the reference designs that show various forms of interaction between the two processors.
標(biāo)簽: XAPP 996 雙處理器 參考設(shè)計(jì)
上傳時間: 2013-10-29
上傳用戶:旭521
With the Altera Nios II embedded processor, you as the system designercan accelerate time-critical software algorithms by adding custominstructions to the Nios II processor instruction set. Using custominstructions, you can reduce a complex sequence of standard instructionsto a single instruction implemented in hardware. You can use this featurefor a variety of applications, for example, to optimize software innerloops for digital signal processing (DSP), packet header processing, andcomputation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphicaluser interface (GUI) used to add up to 256 custom instructions to theNios II processor
上傳時間: 2013-11-07
上傳用戶:swing
在研究傳統(tǒng)家用燃?xì)鈭?bào)警器的基礎(chǔ)上,以ZigBee協(xié)議為平臺,構(gòu)建mesh網(wǎng)狀網(wǎng)絡(luò)實(shí)現(xiàn)網(wǎng)絡(luò)化的智能語音報(bào)警系統(tǒng)。由于傳感器本身的溫度和實(shí)際環(huán)境溫度的影響,傳感器標(biāo)定后采用軟件補(bǔ)償方法。為了減少系統(tǒng)費(fèi)用,前端節(jié)點(diǎn)采用半功能節(jié)點(diǎn)設(shè)備,路由器和協(xié)調(diào)器采用全功能節(jié)點(diǎn)設(shè)備,構(gòu)建mesh網(wǎng)絡(luò)所形成的家庭內(nèi)部報(bào)警系統(tǒng),通過通用的電話接口連接到外部的公用電話網(wǎng)絡(luò),啟動語音模塊進(jìn)行報(bào)警。實(shí)驗(yàn)結(jié)果表明,在2.4 GHz頻率下傳輸,有墻等障礙物的情況下,節(jié)點(diǎn)的傳輸距離大約為35 m,能夠滿足家庭需要,且系統(tǒng)工作穩(wěn)定,但在功耗方面仍需進(jìn)一步改善。 Abstract: On the basis of studying traditional household gas alarm system, this paper proposed the platform for the ZigBee protocol,and constructed mesh network to achieve network-based intelligent voice alarm system. Because of the sensor temperature and the actual environment temperature, this system design used software compensation after calibrating sensor. In order to reduce system cost, semi-functional node devices were used as front-end node, however, full-function devices were used as routers and coordinator,constructed alarm system within the family by building mesh network,connected to the external public telephone network through the common telephone interface, started the voice alarm module. The results indicate that nodes transmit about 35m in the distance in case of walls and other obstacles by 2.4GHz frequency transmission, this is able to meet family needs and work steadily, but still needs further improvement in power consumption.
標(biāo)簽: ZigBee 無線智能 家 報(bào)警系統(tǒng)
上傳時間: 2013-10-30
上傳用戶:swaylong
Single-Ended and Differential S-Parameters Differential circuits have been important incommunication systems for many years. In the past,differential communication circuits operated at lowfrequencies, where they could be designed andanalyzed using lumped-element models andtechniques. With the frequency of operationincreasing beyond 1GHz, and above 1Gbps fordigital communications, this lumped-elementapproach is no longer valid, because the physicalsize of the circuit approaches the size of awavelength.Distributed models and analysis techniques are nowused instead of lumped-element techniques.Scattering parameters, or S-parameters, have beendeveloped for this purpose [1]. These S-parametersare defined for single-ended networks. S-parameterscan be used to describe differential networks, but astrict definition was not developed until Bockelmanand others addressed this issue [2]. Bockelman’swork also included a study on how to adapt single-ended S-parameters for use with differential circuits[2]. This adaptation, called “mixed-mode S-parameters,” addresses differential and common-mode operation, as well as the conversion betweenthe two modes of operation.This application note will explain the use of single-ended and mixed-mode S-parameters, and the basicconcepts of microwave measurement calibration.
上傳時間: 2014-03-25
上傳用戶:yyyyyyyyyy
提出了一種以ARM微處理器為控制核心的遠(yuǎn)程無線視頻監(jiān)控終端的設(shè)計(jì)方案,其監(jiān)控終端的硬件設(shè)計(jì)包括視頻采集處理、中央管理控制、無線傳輸3個模塊。并給出了監(jiān)控終端的軟件開發(fā)平臺和開發(fā)模式的系統(tǒng)啟動代碼、嵌入式Linux系統(tǒng)移植以及驅(qū)動程序和應(yīng)用程序。測試結(jié)果表明,該監(jiān)控終端設(shè)計(jì)方案合理、有效,基本滿足監(jiān)控需求。 Abstract: A remote wireless video monitoring terminal design, which uses ARM microprocessor as its core control, is proposed in this paper.The hardware design of monitoring terminal system is composed of the video acquisition and processing module, the central management and control module, wireless transmission module.Meanwhile the monitoring terminal-s software development platform and development patterns are designed. Also the design of the system-s start codes, embedded Linux system-s transplantation process, driver and the corresponding applications are given. The results showed that the monitoring terminal design is reasonable, effective, basically meet monitoring requirements.
標(biāo)簽: ARM 遠(yuǎn)程無線 視頻監(jiān)控 終端設(shè)計(jì)
上傳時間: 2013-11-13
上傳用戶:wanqunsheng
解壓密碼:www.elecfans.com 隨著微電子技術(shù)的迅速發(fā)展以及集成電路規(guī)模不斷提高,對電路性能的設(shè)計(jì) 要求越來越嚴(yán)格,這勢必對用于大規(guī)模集成電路設(shè)計(jì)的EDA 工具提出越來越高的 要求。自1972 年美國加利福尼亞大學(xué)柏克萊分校電機(jī)工程和計(jì)算機(jī)科學(xué)系開發(fā) 的用于集成電路性能分析的電路模擬程序SPICE(Simulation Program with IC Emphasis)誕生以來,為適應(yīng)現(xiàn)代微電子工業(yè)的發(fā)展,各種用于集成電路設(shè)計(jì)的 電路模擬分析工具不斷涌現(xiàn)。HSPICE 是Meta-Software 公司為集成電路設(shè)計(jì)中 的穩(wěn)態(tài)分析,瞬態(tài)分析和頻域分析等電路性能的模擬分析而開發(fā)的一個商業(yè)化通 用電路模擬程序,它在柏克萊的SPICE(1972 年推出),MicroSim公司的PSPICE (1984 年推出)以及其它電路分析軟件的基礎(chǔ)上,又加入了一些新的功能,經(jīng) 過不斷的改進(jìn),目前已被許多公司、大學(xué)和研究開發(fā)機(jī)構(gòu)廣泛應(yīng)用。HSPICE 可 與許多主要的EDA 設(shè)計(jì)工具,諸如Candence,Workview 等兼容,能提供許多重要 的針對集成電路性能的電路仿真和設(shè)計(jì)結(jié)果。采用HSPICE 軟件可以在直流到高 于100MHz 的微波頻率范圍內(nèi)對電路作精確的仿真、分析和優(yōu)化。在實(shí)際應(yīng)用中, HSPICE能提供關(guān)鍵性的電路模擬和設(shè)計(jì)方案,并且應(yīng)用HSPICE進(jìn)行電路模擬時, 其電路規(guī)模僅取決于用戶計(jì)算機(jī)的實(shí)際存儲器容量。 The HSPICE Integrator Program enables qualified EDA vendors to integrate their products with the de facto standard HSPICE simulator, HSPICE RF simulator, and WaveView Analyzer™. In addition, qualified HSPICE Integrator Program members have access to HSPICE integrator application programming interfaces (APIs). Collaboration between HSPICE Integrator Program members will enable customers to achieve more thorough design verification in a shorter period of time from the improvements offered by inter-company EDA design solutions.
標(biāo)簽: download hspice 2007
上傳時間: 2013-11-10
上傳用戶:123312
This example shows how to update at regulate period the WWDG counter using theEarly Wakeup interrupt (EWI). The WWDG timeout is set to 262ms, refresh window set to 41h and the EWI isenabled. When the WWDG counter reaches 40h the EWI is generated and in the WWDGISR the counter is refreshed to prevent a WWDG reset and led connected to PC.07is toggled.The EXTI line9 is connected to PB.09 pin and configured to generate an interrupton falling edge.In the NVIC, EXTI line9 to 5 interrupt vector is enabled with priority equal to 0and the WWDG interrupt vector is enabled with priority equal to 1 (EXTI IT > WWDG IT). The EXTI Line9 will be used to simulate a software failure: once the EXTI line9event occurs (by pressing Key push-button on EVAL board) the correspondent interruptis served, in the ISR the led connected to PC.07 is turned off and the EXTI line9pending bit is not cleared. So the CPU will execute indefinitely EXTI line9 ISR andthe WWDG ISR will never be entered(WWDG counter not updated). As result, when theWWDG counter falls to 3Fh the WWDG reset occurs.If the EXTI line9 event don抰 occurs the WWDG counter is indefinitely refreshed inthe WWDG ISR which prevent from WWDG reset. If the WWDG reset is generated, after resuming from reset a led connected to PC.06is turned on. In this example the system is clocked by the HSE(8MHz).
上傳時間: 2013-11-11
上傳用戶:gundamwzc
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