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signal-processing

  • 基于C8051F005單片機(jī)的參數(shù)測(cè)試儀的設(shè)計(jì)

    介紹了基于單片機(jī)航空交流電參數(shù)測(cè)試儀的系統(tǒng)設(shè)計(jì)。以Silicon Labs公司的C8051F005單片機(jī)為核心設(shè)計(jì)出數(shù)據(jù)采集板,通過(guò)RS-232串口與上位機(jī)通訊。運(yùn)用Lab Windows/CVI編寫的上位機(jī)軟件實(shí)現(xiàn)信號(hào)的檢測(cè)以及波形和數(shù)據(jù)的顯示,給出了測(cè)試儀硬件電路的組成和軟件流程圖。本系統(tǒng)具有硬件結(jié)構(gòu)簡(jiǎn)單、容易實(shí)現(xiàn)和成本低等特點(diǎn),在實(shí)際應(yīng)用中其穩(wěn)定性、精確性均能滿足客戶要求。 Abstract:  The design of aeronautics AC parameters tester based on the single-chip is introduced.The core component of data acquisition board is C8051F005 single chip of Silicon Labs Company,and communication with PC through RS-232. The signal processing software programmed with LabWindows/CVI can be used successfully to fulfill inspection of signal and display of the waveform and data. The hardware and software configuration of test instrument are provided.The hardware of the system is simple, and can be easily realized.The stability and precision of the measurement instrument are enough to meet the requirements.

    標(biāo)簽: C8051F005 單片機(jī) 儀的設(shè)計(jì) 參數(shù)測(cè)試

    上傳時(shí)間: 2013-11-18

    上傳用戶:wang5829

  • SPCE061A單片機(jī)簡(jiǎn)介

    隨著單片機(jī)功能集成化的發(fā)展,其應(yīng)用領(lǐng)域也逐漸地由傳統(tǒng)的控制,擴(kuò)展為控制處理、數(shù)據(jù)處理以及數(shù)字信號(hào)處理(DSP,Digital Signal Processing)等領(lǐng)域。凌陽(yáng)的16位單片機(jī)就是為適應(yīng)這種發(fā)展而設(shè)計(jì)的。它的CPU內(nèi)核采用凌陽(yáng)最新推出的µ’nSP™(Microcontroller and Signal Processor)16位微處理器芯片(以下簡(jiǎn)稱µ’nSP™)。圍繞µ’nSP™所形成的16位µ’nSP™系列單片機(jī)(以下簡(jiǎn)稱µ’nSP™家族)采用的是模塊式集成結(jié)構(gòu),它以µ’nSP™內(nèi)核為中心集成不同規(guī)模的ROM、RAM和功能豐富的各種外設(shè)接口部件。

    標(biāo)簽: SPCE 061A 061 單片機(jī)

    上傳時(shí)間: 2013-11-07

    上傳用戶:wpwpwlxwlx

  • DTMF Decoding with a PIC16xxx

    This application note describes how to decode standard DTMF tones using the minimum number of external discrete components and a PIC. The two examples use a PIC which has an 8 bit timer and either a comparator or an ADC, although it can be modified for use on a PIC which has only digital I/O. The Appendices have example code for the 16C662 (with comparator) and 16F877 (using the ADC). As the majority of the Digital Signal Processing is done in software, little is required in the way of external signal conditioning. Software techniques are used to model the individual elements of a DTMF Decoder IC.

    標(biāo)簽: Decoding DTMF with PIC

    上傳時(shí)間: 2013-11-21

    上傳用戶:zhaoke2005

  • SPCE061A指令系統(tǒng)

    SPCE061A采用的內(nèi)核           SPCE061A采用的內(nèi)核(CPU)為μ‘nSP。          μ‘nSP(讀做micro-n-S-P)是凌陽(yáng)科技推出的16位微處理器,它的突出特點(diǎn)是較高的處理速度,這就使其有能力進(jìn)行復(fù)雜的數(shù)字信號(hào)處理(DSP,Digital Signal Processing)。 μ‘nSP內(nèi)核由凌陽(yáng)自主開發(fā),因而也具備它自己的指令系統(tǒng)。 指令系統(tǒng).61 3.1 指令系統(tǒng)的概述及符號(hào)約定.61 3.2 數(shù)據(jù)傳送指令62 3.3 算術(shù)運(yùn)算..66 3.3.1 加法運(yùn)算..67 3.3.2 減法運(yùn)算..68 3.3.3 帶進(jìn)位的加減運(yùn)算.70 3.3.4 取補(bǔ)運(yùn)算..70 3.3.5 SPCE061A的乘法指令.71 3.3.6 SPCE061A的n項(xiàng)內(nèi)積運(yùn)算指令.71 3.3.7 比較運(yùn)算(影響標(biāo)志位N,Z,S,C)..73 3.4 SPCE061A的邏輯運(yùn)算.74 3.4.1 邏輯與..74 3.4.2 邏輯或..75 3.4.3 邏輯異或..76 3.4.4 測(cè)試(TEST).78 3.4.5 SPCE061A的移位操作.80 3.5 SPCE061A的控制轉(zhuǎn)移類指令..83 3.6 偽指令86 3.6.1 偽指令的語(yǔ)法格式及特點(diǎn)..87 3.6.2 偽指令符號(hào)約定..87 3.6.3 標(biāo)準(zhǔn)偽指令.87 3.6.4 宏定義與調(diào)用98 3.6.5 段的定義與調(diào)用101 3.6.6 結(jié)構(gòu)的定義與調(diào)用..102 3.6.7 過(guò)程的定義與調(diào)用..106 3.6.8 偽指令的應(yīng)用舉例..106

    標(biāo)簽: SPCE 061A 061 指令系統(tǒng)

    上傳時(shí)間: 2013-10-31

    上傳用戶:xuanchangri

  • NIOSII用戶定制指令

    With the Altera Nios II embedded processor, you as the system designercan accelerate time-critical software algorithms by adding custominstructions to the Nios II processor instruction set. Using custominstructions, you can reduce a complex sequence of standard instructionsto a single instruction implemented in hardware. You can use this featurefor a variety of applications, for example, to optimize software innerloops for digital signal processing (DSP), packet header processing, andcomputation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphicaluser interface (GUI) used to add up to 256 custom instructions to theNios II processor

    標(biāo)簽: NIOSII 用戶 定制 指令

    上傳時(shí)間: 2013-11-07

    上傳用戶:swing

  • LPC4300系列ARM雙核微控制器產(chǎn)品數(shù)據(jù)手冊(cè)

    The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD instructions. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals

    標(biāo)簽: 4300 LPC ARM 雙核微控制器

    上傳時(shí)間: 2013-10-28

    上傳用戶:15501536189

  • Nios II定制指令用戶指南

         Nios II定制指令用戶指南:With the Altera Nios II embedded processor, you as the system designer can accelerate time-critical software algorithms by adding custom instructions to the Nios II processor instruction set. Using custom instructions, you can reduce a complex sequence of standard instructions to a single instruction implemented in hardware. You can use this feature for a variety of applications, for example, to optimize software inner loops for digital signal processing (DSP), packet header processing, and computation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphical user interface (GUI) used to add up to 256 custom instructions to the Nios II processor. The custom instruction logic connects directly to the Nios II arithmetic logic unit (ALU) as shown in Figure 1–1.

    標(biāo)簽: Nios 定制 指令 用戶

    上傳時(shí)間: 2013-10-12

    上傳用戶:kang1923

  • 賽靈思電機(jī)控制開發(fā)套件簡(jiǎn)介(英文版)

      The power of programmability gives industrial automation designers a highly efficient, cost-effective alternative to traditional motor control units (MCUs)。 The parallel-processing power, fast computational speeds, and connectivity versatility of Xilinx® FPGAs can accelerate the implementation of advanced motor control algorithms such as Field Oriented Control (FOC)。   Additionally, Xilinx devices lower costs with greater on-chip integration of system components and shorten latencies with high-performance digital signal processing (DSP) that can tackle compute-intensive functions such as PID Controller, Clark/Park transforms, and Space Vector PWM.   The Xilinx Spartan®-6 FPGA Motor Control Development Kit gives designers an ideal starting point for evaluating time-saving, proven, motor-control reference designs. The kit also shortens the process of developing custom control capabilities, with integrated peripheral functions (Ethernet, PowerLink, and PCI® Express), a motor-control FPGA mezzanine card (FMC) with built-in Texas Instruments motor drivers and high-precision Delta-Sigma modulators, and prototyping support for evaluating alternative front-end circuitry.

    標(biāo)簽: 賽靈思 電機(jī)控制 開發(fā)套件 英文

    上傳時(shí)間: 2013-10-28

    上傳用戶:wujijunshi

  • Mobile phones are constantly decreasing in size, thereby complicating the acoustical functionality.

    Mobile phones are constantly decreasing in size, thereby complicating the acoustical functionality. Signal processing methods can be used to partially mitigate this problem. In this paper we suggest a method which uses multiple spectral subtraction functions and two microphones, introducing only a short signal delay.

    標(biāo)簽: functionality complicating acoustical constantly

    上傳時(shí)間: 2015-11-15

    上傳用戶:youth25

  • The data files included are .MAT or *.dat (ASCII)files. The m-files and the data may be distributed

    The data files included are .MAT or *.dat (ASCII)files. The m-files and the data may be distributed, provided that the source is acknowledged in any publication and the data are not sold. Since this software is being distributed free of charge, the authors are not offering any technical support. Students who have any questions or difficulties using this software, or require the additional functions from the Signal Processing Toolbox should contact their professor.

    標(biāo)簽: files data distributed The

    上傳時(shí)間: 2014-12-06

    上傳用戶:wuyuying

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