Use the on-board potentiometer to simulate an analog input,this input converted into a meaningful digital value in a microcontroller register, and use a group of LED to display this value.
Abstract: We don't expect manufacturers to produce clothes that in one size that fits everyone. In thesame way, one ESD component can't solve all issues—each application has different ESD requirements.Knowing that "one size fits all" cannot apply to power design, the power designer, or the engineering"super hero," must consider all the potential disruptions to a steady flow of power and thenvarious waysto mitigate them. This tutorial describes voltage- and current-limiting devices and risetime reducers tomanage the power. It also points to free and low-cost software tools to help design lowpass filters, checkcapacitor self-resonance, and simulate circuits.
This example shows how to update at regulate period the WWDG counter using theEarly Wakeup interrupt (EWI).
The WWDG timeout is set to 262ms, refresh window set to 41h and the EWI isenabled. When the WWDG counter reaches 40h the EWI is generated and in the WWDGISR the counter is refreshed to prevent a WWDG reset and led connected to PC.07is toggled.The EXTI line9 is connected to PB.09 pin and configured to generate an interrupton falling edge.In the NVIC, EXTI line9 to 5 interrupt vector is enabled with priority equal to 0and the WWDG interrupt vector is enabled with priority equal to 1 (EXTI IT > WWDG IT).
The EXTI Line9 will be used to simulate a software failure: once the EXTI line9event occurs (by pressing Key push-button on EVAL board) the correspondent interruptis served, in the ISR the led connected to PC.07 is turned off and the EXTI line9pending bit is not cleared. So the CPU will execute indefinitely EXTI line9 ISR andthe WWDG ISR will never be entered(WWDG counter not updated). As result, when theWWDG counter falls to 3Fh the WWDG reset occurs.If the EXTI line9 event don抰 occurs the WWDG counter is indefinitely refreshed inthe WWDG ISR which prevent from WWDG reset.
If the WWDG reset is generated, after resuming from reset a led connected to PC.06is turned on.
In this example the system is clocked by the HSE(8MHz).
* This a simple tool to send/receive UDP packet based on a
* free software developed by Neil Deason.
* The purpose of program is to simulate a remote MGC So that the
* SIP Message debugging/testing is possible.
NIST Net – A Linux-based Network Emulation Tool, It is a raw IP packet filter with many controllable channel parameters such as packet loss ratio, jitter, bandwidth variation, delay, and network buffer size. To simulate different network environments
this a Navier-Stokes equations solver. It support grids contains of multiple connected rectangles. So you can simulate viscous flows in any complicated tubes
The MEASURE program uses the analog inputs of the P89LPC935
to implement a datalogger. This example shows how you can
use signal functions in uVision to simulate a signal coming
into one of the analog inputs of the P89LPC935 controller.
This a FREE tool chain which compiles C codes into 8051 binary code, converts the binary to RTL ROM, and simulate in Modelsim.
SDCC is the compiler.
Example compilation:
cd compile
sdcc --iram-size 0x80 --xram-size 0x800 t8051.c
REM sdcc --iram-size 0x80 t8051.c
packihx t8051.ihx > t8051.hex
..\test\mkrom.exe ..\compile\t8051.hex
