<abbr id="o22qi"></abbr> it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.
標(biāo)簽： synthesize simulator modelsim interin
上傳時間： 2017-03-22
上傳用戶：洛木卓
it is a verilog code written for digital watch in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]
標(biāo)簽： synthesize simulator modelsim digital
上傳時間： 2014-01-10
上傳用戶：kernaling
it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.
標(biāo)簽： synthesize simulator modelsim verilog
上傳時間： 2014-06-26
上傳用戶：zhuyibin
it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].it is a state machine based code.
標(biāo)簽： controller synthesize verilog traffic
上傳時間： 2017-03-22
上傳用戶：xymbian
it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]
標(biāo)簽： synthesize verilog machine written
上傳時間： 2013-12-11
上傳用戶：yepeng139
An timer application for AVR mega family processors using unmodified freertos
標(biāo)簽： application processors unmodified freertos
上傳時間： 2017-03-24
上傳用戶：ghostparker
Code signer for iPhone
標(biāo)簽： signer iPhone Code for
上傳時間： 2017-04-01
上傳用戶：zgu489
code keil for PC16552D
標(biāo)簽： 16552D 16552 code keil
上傳時間： 2014-01-14
上傳用戶：sunjet
This code is for transmission and reception on 8880,lcd and 24cxx chip using 8051.
標(biāo)簽： transmission and reception using
上傳時間： 2013-11-28
上傳用戶：zhanditian
Freescile MXC91231 source file is containing for hardhat
標(biāo)簽： containing Freescile hardhat source
上傳時間： 2014-11-12
上傳用戶：ghostparker
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