The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Specification Revision 2.0a ([Ref 6]) dictates that when a target signals adata transfer, "the target must do so within 16 clocks of the assertion of FRAME#." PCItermination transactions, such as Split Response/Complete, are commonly used to meet thelatency specifications. This method adds complexity to the design, as well as additional systemlatency. Another solution is to increase the ratio of the memory frequency to the PCI-X busfrequency. However, this solution increases the required power and clock resource usage.
上傳時間： 2013-11-24
上傳用戶：18707733937
XAPP520將符合2.5V和3.3V I/O標準的7系列FPGA高性能I/O Bank進行連接 The I/Os in Xilinx® 7 series FPGAs are classified as either high range (HR) or high performance (HP) banks. HR I/O banks can be operated from 1.2V to 3.3V, whereas HP I/O banks are optimized for operation between 1.2V and 1.8V. In circumstances that require an HP 1.8V I/O bank to interface with 2.5V or 3.3V logic, a range of options can be deployed. This application note describes methodologies for interfacing 7 series HP I/O banks with 2.5V and 3.3V systems
上傳時間： 2013-11-06
上傳用戶：wentianyou
This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.
上傳時間： 2013-11-20
上傳用戶：pzw421125
歡迎使用 PowerPCB 教程。本教程描述了 PADS-PowerPCB 的絕大部分功能和特點，以及使用的各個過程，這些功能包括： · 基本操作 · 建立元件(Component) · 建立板子邊框線(Board outline) · 輸入網表(Netlist) · 設置設計規則(Design Rule) · 元件(Part)的布局(Placement) · 手工和交互的布線 · SPECCTRA全自動布線器(Route Engine) · 覆銅(Copper Pour) · 建立分隔/混合平面層(Split/mixed Plane) · Microsoft的目標連接與嵌入(OLE)(Object Linking Embedding) · 可選擇的裝配選件(Assembly options) · 設計規則檢查(Design Rule Check) · 反向標注(Back Annotation) · 繪圖輸出(Plot Output) 使用本教程后，你可以學到印制電路板設計和制造的許多基本知識。
上傳時間： 2013-10-08
上傳用戶：x18010875091
各種功能的計數器實例（VHDL源代碼）:ENTITY counters IS PORT ( d : IN INTEGER RANGE 0 TO 255; clk : IN BIT; clear : IN BIT; ld : IN BIT; enable : IN BIT; up_down : IN BIT; qa : OUT INTEGER RANGE 0 TO 255; qb : OUT INTEGER RANGE 0 TO 255; qc : OUT INTEGER RANGE 0 TO 255; qd : OUT INTEGER RANGE 0 TO 255; qe : OUT INTEGER RANGE 0 TO 255; qf : OUT INTEGER RANGE 0 TO 255; qg : OUT INTEGER RANGE 0 TO 255; qh : OUT INTEGER RANGE 0 TO 255; qi : OUT INTEGER RANGE 0 TO 255;
上傳時間： 2013-10-09
上傳用戶：松毓336
集合式直流電能表（小功率的） 特點： 精確度0.05%滿刻度±1位數 可同時量測與顯示/直流電壓/電流/瓦特（千瓦）/瓦特小時（千瓦小時） 電壓輸入（DC0-99.99V/0-600.0V）自動變檔功能 顯示范圍0-9999(電流/瓦特/千瓦),0至99999999(八位數瓦特小時)可任意規劃 數位RS-485 界面 (Optional) 主要規格： 輔助電源消耗功率：＜0.35VA(DC12V/DC24V) ＜0.5VA（DC48V） ＜1.5VA（AC90-240V(50/60Hz)） 精確度: 0.05% F.S. ±1 digit (23 ±5℃) 輸入范圍：Auto range(DC0-99.99V/0-600.0V(DC voltage)) 輸入抗阻：＞5MΩ（DC voltage） 取樣時間：10 cycles/second(total) 過載顯示: " doFL " 顯示值范圍: 0-9999 digit（DCA/W(KW)） 0-9999999.999 digit(WH/(KWH)) RS-485傳輸速度: 19200/9600/4800/2400 selective RS-485通訊位址: "01"-"FF"（0-255） RS-485通信協議: Modbus RTU mode 溫度系數: 50ppm/℃ (0-50℃) 顯示幕:Bight Red LEDs high 10.16 mm(0.4") 參數設定方式: Touch switches 記憶方式: Non-volatile E²PROM memory 絕緣耐壓能力:2KVac/1min.(input/output)（RS-485(Isolating)） 1600 Vdc (input/output) （RS-485(Isolating)） 使用環境條件: 0-50℃(20 to 90% RH non-condensed) 存放環境條件: 0-70℃(20 to 90% RH non-condensed) CE認證: EN 55022:1998/A1:2000 Class A EN 61000-3-2:2000 EN 61000-3-3:1995/A1:2001 EN 55024:1998/A1:2001
上傳時間： 2013-11-20
上傳用戶：s363994250
Frequently, voltage reference stability and noise defi nemeasurement limits in instrumentation systems. In particular,reference noise often sets stable resolution limits.Reference voltages have decreased with the continuingdrop in system power supply voltages, making referencenoise increasingly important. The compressed signalprocessing range mandates a commensurate reductionin reference noise to maintain resolution. Noise ultimatelytranslates into quantization uncertainty in A to D converters,introducing jitter in applications such as scales, inertialnavigation systems, infrared thermography, DVMs andmedical imaging apparatus. A new low voltage reference,the LTC6655, has only 0.3ppm (775nV) noise at 2.5VOUT.Figure 1 lists salient specifi cations in tabular form. Accuracyand temperature coeffi cient are characteristic ofhigh grade, low voltage references. 0.1Hz to 10Hz noise,particularly noteworthy, is unequalled by any low voltageelectronic reference.
上傳時間： 2013-10-30
上傳用戶：wxhwjf
Rotates an image by the angle degrees in the % CCW direction. Degrees may be any number. % The function will put degrees in the range 0 % to 360 degrees and then into a range of -45 to 45 % degrees after performing elementary 90 degree rotations.
標簽： direction the Rotates Degrees
上傳時間： 2013-12-10
上傳用戶：sardinescn
This program will ask how many numbers you want to find the average of, then it will allow you to enter your numbers(yes they can even be decimals) then it will calculate the mean, median, mode and range of what you enter.
上傳時間： 2015-03-23
上傳用戶：skhlm
The I2C Memory Model is a generic Proteus VSM model designed to model the timing and functionality of I2C memory devices from a wide range of manufacturers.
標簽： model functionality designed Proteus
上傳時間： 2015-04-25
上傳用戶：Divine
