The emphasis of this book is on real-time application of Synopsys tools, used
to combat various problems seen at VDSM geometries. Readers will be
exposed to an effective design methodology for handling complex, submicron
ASIC designs. Significance is placed on HDL coding styles,
synthesis and optimization, dynamic simulation, formal verification, DFT
scan insertion, links to layout, physical synthesis, and static timing analysis.
At each step, problems related to each phase of the design flow are identified,
with solutions and work-around described in detail. In addition, crucial issues
related to layout, which includes clock tree synthesis and back-end
integration (links to layout) are also discussed at length. Furthermore, the
book contains in-depth discussions on the basics of Synopsys technology
libraries and HDL coding styles, targeted towards optimal synthesis solution.
The contemporary view of the Smart City is very much static and infrastructure-
centric, focusing on installation and subsequent management of Edge devices and
analytics of data provided by these devices. While this still allows a more efficient
management of the city’s infrastructure, optimizations and savings in different do-
mains, the existing architectures are currently designed as single-purpose, vertically
siloed solutions. This hinders active involvement of a variety of stakeholders (e.g.,
citizens and businesses) who naturally form part of the city’s ecosystem and have an
inherent interest in jointly coordinating and influencing city-level activities.
Wireless Fidelity (Wi-Fi) networks have become mainstream over the last few years. What
started out as cable replacement for static desktops in indoor networks has been extended
to fully mobile broadband applications involving moving vehicles, high-speed trains, and
even airplanes.