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synchronized

  • 講解CDMA系統(tǒng)的專業(yè)書籍,本書的主要側(cè)重點(diǎn)是synchronized CDMA systems的容限分析

    講解CDMA系統(tǒng)的專業(yè)書籍,本書的主要側(cè)重點(diǎn)是synchronized CDMA systems的容限分析

    標(biāo)簽: CDMA synchronized systems

    上傳時間: 2013-12-22

    上傳用戶:zhenyushaw

  • a simple thread program to print numbers it can be synchronized with operating system tickms by inc

    a simple thread program to print numbers it can be synchronized with operating system tickms by including t1.sleep(1000) <time in milliseconds> in the ADD() method

    標(biāo)簽: synchronized operating program numbers

    上傳時間: 2017-06-21

    上傳用戶:ANRAN

  • 100-15V TO 12V DCDC 原理圖 PCB BOM表

    高的工作電壓高達(dá)100V N雙N溝道MOSFET同步驅(qū)動 The D810DCDC is a synchronous step-down switching regulator controller that can directly step-down voltages from up to 100V, making it ideal for telecom and automotive applications. The D810DCDC uses a constant on-time valley current control architecture to deliver very low duty cycles with accurate cycle-by-cycle current limit, without requiring a sense resistor. A precise internal reference provides 0.5% DC accuracy. A high bandwidth (25MHz) error amplifi er provides very fast line and load transient response. Large 1Ω gate drivers allow the D810DCDC to drive multiple MOSFETs for higher current applications. The operating frequency is selected by an external resistor and is compensated for variations in VIN and can also be synchronized to an external clock for switching-noise sensitive applications. Integrated bias control generates gate drive power from the input supply during start-up and when an output shortcircuit occurs, with the addition of a small external SOT23 MOSFET. When in regulation, power is derived from the output for higher effi ciency.

    標(biāo)簽: DCDC 100 12V BOM

    上傳時間: 2013-10-24

    上傳用戶:wd450412225

  • Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGH

    Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.

    標(biāo)簽: SHIFTER name module Input

    上傳時間: 2013-12-13

    上傳用戶:himbly

  • Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGH

    Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.

    標(biāo)簽: SHIFTER name module Input

    上傳時間: 2014-01-20

    上傳用戶:三人用菜

  • 鈥?What Is a Thread? o The Thread Class o Simple Thread Examples 鈥?Problems with Multithreading

    鈥?What Is a Thread? o The Thread Class o Simple Thread Examples 鈥?Problems with Multithreading o What Goes Wrong? o Thread Names and Current Threads o Java s synchronized 鈥?Synchronizing Threads o Multiple Locks 鈥?The Dining Philosophers Problem o Deadlocks o A Solution to the Dining Philosophers Problem o Java s wait() and notify() o Dining Philosophers Example 鈥?Summary

    標(biāo)簽: Thread Multithreading Examples Problems

    上傳時間: 2017-03-02

    上傳用戶:kristycreasy

  • 4、多線程有幾種實現(xiàn)方法,都是什么?同步有幾種實現(xiàn)方法,都是什么? 答:多線程有兩種實現(xiàn)方法

    4、多線程有幾種實現(xiàn)方法,都是什么?同步有幾種實現(xiàn)方法,都是什么? 答:多線程有兩種實現(xiàn)方法,分別是繼承Thread類與實現(xiàn)Runnable接口 同步的實現(xiàn)方面有兩種,分別是synchronized,wait與notify

    標(biāo)簽: 實現(xiàn)方法 多線程

    上傳時間: 2017-05-25

    上傳用戶:dianxin61

  • java 線程 靜態(tài)鎖

    java 線程 靜態(tài)鎖,對象鎖, synchronized 是鎖方法還是鎖對象?還是鎖類?如何實現(xiàn)?? 部分代碼如下, public static Object lock=new Object() //靜態(tài)鎖,鎖類,不是鎖對象了!!所以兩個線程同時 運(yùn)行兩個 TestThread 的execute( ),也可以同步!!! public void execute(){ // synchronized(lock){ for(int i=0 i<20 i++){ try { Thread.sleep(30) } catch (InterruptedException e) { // TODO Auto-generated catch block e.printStackTrace() } System.out.println(Thread.currentThread().getName()+Thread.currentThread ().getName()+" "+i) } } }

    標(biāo)簽: java 線程

    上傳時間: 2017-07-15

    上傳用戶:lijianyu172

  • Computational+Intelligence

    The large-scale deployment of the smart grid (SG) paradigm could play a strategic role in supporting the evolution of conventional electrical grids toward active, flexible and self- healing web energy networks composed of distributed and cooperative energy resources. From a conceptual point of view, the SG is the convergence of information and operational technologies applied to the electric grid, providing sustainable options to customers and improved security. Advances in research on SGs could increase the efficiency of modern electrical power systems by: (i) supporting the massive penetration of small-scale distributed and dispersed generators; (ii) facilitating the integration of pervasive synchronized metering systems; (iii) improving the interaction and cooperation between the network components; and (iv) allowing the wider deployment of self-healing and proactive control/protection paradigms.

    標(biāo)簽: Computational Intelligence

    上傳時間: 2020-06-07

    上傳用戶:shancjb

  • Computational+Intelligence

    The large-scale deployment of the smart grid (SG) paradigm could play a strategic role in supporting the evolution of conventional electrical grids toward active, flexible and self- healing web energy networks composed of distributed and cooperative energy resources. From a conceptual point of view, the SG is the convergence of information and operational technologies applied to the electric grid, providing sustainable options to customers and improved security. Advances in research on SGs could increase the efficiency of modern electrical power systems by: (i) supporting the massive penetration of small-scale distributed and dispersed generators; (ii) facilitating the integration of pervasive synchronized metering systems; (iii) improving the interaction and cooperation between the network components; and (iv) allowing the wider deployment of self-healing and proactive control/protection paradigms.

    標(biāo)簽: Computational Intelligence

    上傳時間: 2020-06-10

    上傳用戶:shancjb

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