Verilog_HDL的基本語法詳解(夏宇聞版)
Verilog_HDL的基本語法詳解(夏宇聞版):Verilog HDL是一種用于數(shù)字邏輯電路設(shè)計(jì)的語言...
Verilog_HDL的基本語法詳解(夏宇聞版):Verilog HDL是一種用于數(shù)字邏輯電路設(shè)計(jì)的語言...
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor...
The introduction of Spartan-3™ devices has createdmultiple changes in the evolution...
很多不同的廠家生產(chǎn)各種型號(hào)的計(jì)算機(jī),它們運(yùn)行完全不同的操作系統(tǒng),但TCP.IP協(xié)議族允許它們互相進(jìn)行通信。這一點(diǎn)很讓人感到吃驚,因?yàn)樗淖饔靡堰h(yuǎn)遠(yuǎn)超出了起初的設(shè)想。T C P / I P起源于6 ...
Abstract: This reference design provides design ideas for a cost-effective, low-power liquid-level...
The Linux Programming Interface - A Linux and UNIX System...
ARM embeded system designer,周立功版本,國內(nèi)較有名的一版。...
The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cort...
The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cort...
完整性高的FPGA-PCB系統(tǒng)化協(xié)同設(shè)計(jì)工具 Cadence OrCAD and Allegro FPGA System Planner便可滿足較復(fù)雜的設(shè)計(jì)及在設(shè)計(jì)初級(jí)產(chǎn)生最佳的I/O...