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We propose and analyze several timestamping of an MPEG-2 Transport Stream transmitted strategies for performing over a packet-switched network using the PCR-unaware encapsulation scheme, and analyze their effect on the quality of the recovered clock at the MPEG-2 Systems decoder.
標(biāo)簽： timestamping transmitted strategies Transport
上傳時(shí)間： 2014-12-05
上傳用戶：450976175
Silicon Motion, Inc. has made best efforts to ensure that the information contained in this document is accurate andreliable. However, the information is subject to change without notice. No responsibility is assumed by SiliconMotion, Inc. for the use of this information, nor for infringements of patents or other rights of third parties.Copyright NoticeCopyright 2002, Silicon Motion, Inc. All rights reserved. No part of this publication may be reproduced, photocopied,or transmitted in any form, without the prior written consent of Silicon Motion, Inc. Silicon Motion, Inc. reserves theright to make changes to the product specification without reservation and without notice to our users
標(biāo)簽： GUIDELINES LAYOUT 320 PCB
上傳時(shí)間： 2014-12-24
上傳用戶：zhaistone
The MAX9257/MAX9258 programmable serializer/deserializer (SerDes) devices transfer both video data and control signals over the same twisted-pair cable. However, control data can only be transmitted during the vertical blank time, which is indicated by the control-channel-enabled output (CCEN) signal. The electronic control unit (ECU) firmware designer needs to know how quickly to respond to the CCEN signal before it times out and how to calculate this duration. This application note describes how to calculate the duration of the CCEN for the MAX9257/MAX9258 SerDes chipset. The calculation is based on STO timeout, clock frequency, and UART bit timing. The CCEN duration is programmable and can be closed if not in use.
標(biāo)簽： SerDes MAXX 9257 9258
上傳時(shí)間： 2014-01-24
上傳用戶：xingisme
在航電系統(tǒng)維護(hù)過程中，為解決定位故障的效率和降低維修成本等問題，提出了基于ICD（Interface Control Document，接口控制文件）的1553B總線的信息監(jiān)控系統(tǒng)模型。該系統(tǒng)運(yùn)用數(shù)據(jù)采集卡對(duì)總線中傳輸?shù)男盘?hào)有無失真、偏差等電氣特性進(jìn)行檢測(cè)，并使用1553B通訊卡通過測(cè)控軟件LabWindows/CVI編程與ICD數(shù)據(jù)庫的動(dòng)態(tài)鏈接，實(shí)現(xiàn)總線信息的解析和故障的判斷。與傳統(tǒng)的維護(hù)過程相比，這種模型能夠從信號(hào)的電氣特性以及信息的解析等全方位的去檢測(cè)判斷故障的來源，并且能夠廣泛在其他1553B總線系統(tǒng)內(nèi)擴(kuò)展應(yīng)用。驗(yàn)證表明該監(jiān)控系統(tǒng)可以對(duì)總線信息進(jìn)行快速有效地監(jiān)測(cè)分析，能滿足應(yīng)用需求。 Abstract: In the process of avionics system maintenance， to solve the problems such as improving the efficiency of fast orientation to troubles and reducing maintenance cost， system of 1553B bus information monitor model based on ICD was proposed. The system observed whether the data which transmitted on the bus appear distortion and deviation by using data acquisition card. And using 1553B communication card programming of the measure software LabWindows/CVI and the dynamic linking of ICD database， message analysis and fault estimation could be realized. Compared with traditional maintenance， this model can all-dimensionally detect and analyze the source of faults from both electrical characteristics of the signal and message analysis， and it can be widely applied in the other 1553B system. Experiment shown that this monitor system can effectively detect and analyze the bus message and can meet the application requirements.
標(biāo)簽： 1553B 總線 信息監(jiān)控
上傳時(shí)間： 2013-11-23
上傳用戶：18752787361
以C8051F020為核心處理器，設(shè)計(jì)無線傳感器網(wǎng)絡(luò)數(shù)據(jù)采集系統(tǒng)。系統(tǒng)采用SZ05-ADV型無線通訊模塊組建Zigbee無線網(wǎng)絡(luò)，結(jié)合嵌入式系統(tǒng)的軟硬件技術(shù)，完成終端節(jié)點(diǎn)的8路傳感器信號(hào)的數(shù)據(jù)采集。現(xiàn)場(chǎng)8路信號(hào)通過前端處理后，分別送入C8051F020的12位A/D轉(zhuǎn)換器進(jìn)行轉(zhuǎn)換。經(jīng)過精確處理、存儲(chǔ)后的現(xiàn)場(chǎng)數(shù)據(jù)，通過Zigbee無線網(wǎng)絡(luò)傳送到上位機(jī)，系統(tǒng)可達(dá)到汽車試驗(yàn)中無線測(cè)試的目的。 Abstract: This paper designs a wireless sensor network system for data acquisition with C8051F020 as core processors.The system used SZ05-ADV wireless communication module，set up a Zigbee wireless network， combined with hardware and software technologies of embedded systems，completed the end-node 8-locale sensor signal data acquisition.Eight locale signals were sent separately into the 12-bit ADC of C8051F020 for conversion through front treatment.After accurate processing and storage，the locale data was transmitted to the host computer through Zigbee wireless.The system achieves the purpose of wireless testing in vehicle trial.
標(biāo)簽： C8051F020 Zigbee 汽車測(cè)試 系統(tǒng)設(shè)計(jì)
上傳時(shí)間： 2013-11-23
上傳用戶：dsgkjgkjg
介紹一種基于C8051單片機(jī)的動(dòng)態(tài)心電監(jiān)護(hù)系統(tǒng)。該系統(tǒng)由兩部分組成：以C8051F320單片機(jī)為核心的數(shù)據(jù)采集裝置和以PC機(jī)為平臺(tái)的分析處理系統(tǒng)。硬件電路功耗低，由單片機(jī)自帶的USB接口將數(shù)據(jù)傳送給PC機(jī)。軟件平臺(tái)采用LabVIEW可視化虛擬儀器系統(tǒng)開發(fā)平臺(tái)，將傳統(tǒng)儀器的功能模塊集成到計(jì)算機(jī)中，用戶可通過修改虛擬儀器的程序改變其功能。采用USB接口實(shí)時(shí)傳輸心電數(shù)據(jù)，并將數(shù)據(jù)采集模塊設(shè)計(jì)為計(jì)算機(jī)外設(shè)，使該系統(tǒng)高速快捷、小巧便攜。 Abstract: In this design，a low-cost ECG electrocardiogram monitoring system is introduced，which consists of two parts:data acquisition device based on C8051F320and PC terminal as the analysis and processing system.The system is low-power consumption，the data is transmitted to the PC terminal by USB interface of the C8051F320.By using the visible virtual instrument system developing platform LabVIEW，the traditional instruments function modules are integrated into the computer，so the user can modify virtual instrument software to change its function to meet their needs.Using USB in-terface to realize real-time ECG data transmission，in addition，ECG data acquisition module is designed as the computer peripheral，which makes the syetem high-speed and portable.
標(biāo)簽： C8051F320 心電監(jiān)護(hù) 系統(tǒng)設(shè)計(jì)
上傳時(shí)間： 2013-11-13
上傳用戶：zhangzhenyu
Information in this document is subject to change without notice and does notrepresent a commitment on the part of the manufacturer. The software describedin this document is furnished under license agreement or nondisclosureagreement and may be used or copied only in accordance with the terms of theagreement. It is against the law to copy the software on any medium except asspecifically allowed in the license or nondisclosure agreement. The purchasermay make one copy of the software for backup purposes. No part of this manualmay be reproduced or transmitted in any form or by any means, electronic ormechanical, including photocopying, recording, or information storage andretrieval systems, for any purpose other than for the purchaser’s personal use,without written permission.
上傳時(shí)間： 2014-12-27
上傳用戶：Tracey
同步技術(shù)是跳頻通信系統(tǒng)的關(guān)鍵技術(shù)之一，尤其是在快速跳頻通信系統(tǒng)中，常規(guī)跳頻通信通過同步字頭攜帶相關(guān)碼的方法來實(shí)現(xiàn)同步，但對(duì)于快跳頻來說，由于是一跳或者多跳傳輸一個(gè)調(diào)制符號(hào)，難以攜帶相關(guān)碼。對(duì)此引入雙跳頻圖案方法，提出了一種適用于快速跳頻通信系統(tǒng)的同步方案。采用短碼攜帶同步信息，克服了快速跳頻難以攜帶相關(guān)碼的困難。分析了同步性能，仿真結(jié)果表明該方案同步時(shí)間短、虛警概率低、捕獲概率高，同步性能可靠。 Abstract: Synchronization is one of the key techniques to frequency-hopping communication system， especially in the fast frequency hopping communication system. In conventional frequency hopping communication systems， synchronization can be achieved by synchronization-head which can be used to carry the synchronization information， but for the fast frequency hopping， Because modulation symbol is transmitted by per hop or multi-hop， it is difficult to carry the correlation code. For the limitation of fast frequency hopping in carrying correlation code， a fast frequency-hopping synchronization scheme with two hopping patterns is proposed. The synchronization information is carried by short code， which overcomes the difficulty of correlation code transmission in fast frequency-hopping. The performance of the scheme is analyzed， and simulation results show that the scheme has the advantages of shorter synchronization time， lower probability of false alarm， higher probability of capture and more reliable of synchronization.
標(biāo)簽： 快速跳頻 同步技術(shù) 通信系統(tǒng)
上傳時(shí)間： 2013-11-23
上傳用戶：mpquest
Silicon Motion, Inc. has made best efforts to ensure that the information contained in this document is accurate andreliable. However, the information is subject to change without notice. No responsibility is assumed by SiliconMotion, Inc. for the use of this information, nor for infringements of patents or other rights of third parties.Copyright NoticeCopyright 2002, Silicon Motion, Inc. All rights reserved. No part of this publication may be reproduced, photocopied,or transmitted in any form, without the prior written consent of Silicon Motion, Inc. Silicon Motion, Inc. reserves theright to make changes to the product specification without reservation and without notice to our users
標(biāo)簽： GUIDELINES LAYOUT 320 PCB
上傳時(shí)間： 2013-10-10
上傳用戶：manga135
The data plane of the reference design consists of a configurable multi-channel XBERT modulethat generates and checks high-speed serial data transmitted and received by the MGTs. Eachchannel in the XBERT module consists of two MGTs (MGTA and MGTB), which physicallyoccupy one MGT tile in the Virtex-4 FPGA. Each MGT has its own pattern checker, but bothMGTs in a channel share the same pattern generator. Each channel can load a differentpattern. The MGT serial rate depends on the reference clock frequency and the internal PMAdivider settings. The reference design can be scaled anywhere from one channel (two MGTs)to twelve channels (twenty-four MGTs).
標(biāo)簽： RocketIO Virtex XAPP 713
上傳時(shí)間： 2013-12-25
上傳用戶：jkhjkh1982
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