數字射頻存儲器(Digital Radio FreqlJencyr：Memory DRFM)具有對射頻信號和微波信號的存儲、處理及傳輸能力，已成為現代雷達系統的重要部件。現代雷達普遍采用了諸如脈沖壓縮、相位編碼等更為復雜的信號處理技術，DRFM由于具有處理這些相干波形的能力，被越來越廣泛地應用于電子對抗領域作為射頻頻率源。目前，國內外對DRFM技術的研究還處于起步階段，DRFM部件在采樣率、采樣精度及存儲容量等方面，還不能滿足現代雷達信號處理的要求。 本文介紹了DRFM的量化類型、基本組成及其工作原理，在現有的研究基礎上提出了一種便于工程實現的設計方法，給出了基于現場可編程門陣列(Field Programmable Gate Array FPGA)實現的幅度量化DRFM設計方案。本方案的采樣率為1 GHz、采樣精度12位，具體實現是采用4個采樣率為250 MHz的ADC并行交替等效時間采樣以達到1 GHz的采樣率。單通道內采用數字正交采樣技術進行相干檢波，用于保存信號復包絡的所有信息。利用FPGA器件實現DRFM的控制器和多路采樣數據緩沖器，采用硬件描述語言(Very High Speed}lardware Description Language VHDL)實現了DRFM電路的FPGA設計和功能仿真、時序分析。方案中采用了大量的低壓差分信號(Low Voltage Differential Signaling LVDS)邏輯的芯片，從而大大降低了系統的功耗，提高了系統工作的可靠性。本文最后對采用的數字信號處理算法進行了仿真，仿真結果證明了設計方案的可行性。 本文提出的基于FPGA的多通道DRFM系統與基于專用FIFO存儲器的DRFM相比，具有更高的性能指標和優越性。
上傳時間： 2013-06-01
上傳用戶：lanwei
BGA布線指南 BGA CHIP PLACEMENT AND ROUTING RULE BGA是PCB上常用的組件，通常CPU、NORTH BRIDGE、SOUTH BRIDGE、AGP CHIP、CARD BUS CHIP…等，大多是以bga的型式包裝，簡言之，80﹪的高頻信號及特殊信號將會由這類型的package內拉出。因此，如何處理BGA package的走線，對重要信號會有很大的影響。 通常環繞在BGA附近的小零件，依重要性為優先級可分為幾類： 1. by pass。 2. clock終端RC電路。 3. damping（以串接電阻、排組型式出現；例如memory BUS信號） 4. EMI RC電路（以dampin、C、pull height型式出現；例如USB信號）。 5. 其它特殊電路（依不同的CHIP所加的特殊電路；例如CPU的感溫電路）。 6. 40mil以下小電源電路組（以C、L、R等型式出現；此種電路常出現在AGP CHIP or含AGP功能之CHIP附近，透過R、L分隔出不同的電源組）。 7. pull low R、C。 8. 一般小電路組（以R、C、Q、U等型式出現；無走線要求）。 9. pull height R、RP。 中文DOC，共5頁，圖文并茂
上傳時間： 2013-04-24
上傳用戶：cxy9698
MPC755 and MPC745 PowerPC microprocessors are high-performance, low-power, 32-bit implementations of
上傳時間： 2013-05-27
上傳用戶：330402686
用fpga實現的DA轉換器，有說明和源碼，VDHL文件。\\r\\nA PLD Based Delta-Sigma DAC\\r\\nDelta-Sigma modulation is the simple, yet powerful,\\r\\ntechnique responsible for the extraordinary\\r\\nperformance and low cost of today s audio CD\\r\\nplayers. The simplest Delta-Sigm
上傳時間： 2013-08-22
上傳用戶：dudu1210004
Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and high-frequency or wideband (> 2xpassband frequency) jitter tolerance in these devices. The article also provides an application example ofa simple highly jittered cycle-skipped sampling clock and describes a method for generating a properbroadband jittered clock. The document then goes on to compare Maxim's audio DAC jitter tolerance tocompetitor audio DACs. Maxim's exceptionally high jitter tolerance allows very simple and low-cost sampleclock implementations.
上傳時間： 2013-10-25
上傳用戶：banyou
The MAX2870 ultra-wideband phase-locked loop (PLL) and voltagecontrol oscillator (VCO) can operate in both integer-N and fractional-Nmodes, similar to the Analog Devices ADF4350 wideband synthesizer.This application note compares the MAX2870 and ADF4350 registers andloop filter design in detail. Users who already familiar with ADF4350 canuse this application note as a quick design reference.
上傳時間： 2014-12-23
上傳用戶：變形金剛
The MAX5713/MAX5714/MAX5715 4-channel, low-power,8-/10-/12-bit, voltage-output digital-to-analog converters(DACs) include output buffers and an internal referencethat is selectable to be 2.048V, 2.500V, or 4.096V. TheMAX5713/MAX5714/MAX5715 accept a wide supplyvoltage range of 2.7V to 5.5V with extremely low power(3mW) consumption to accommodate most low-voltageapplications. A precision external reference input allowsrail-to-rail operation and presents a 100kI (typ) load toan external reference.
上傳時間： 2013-12-23
上傳用戶：ArmKing88
The MAX4968/MAX4968A are 16-channel, high-linearity,high-voltage, bidirectional SPST analog switches with18I (typ) on-resistance. The devices are ideal for use inapplications requiring high-voltage switching controlledby a low-voltage control signal, such as ultrasound imagingand printers. The MAX4968A provides integrated40kI (typ) bleed resistors on each switch terminal todischarge capacitive loads. Using HVCMOS technology,these switches combine high-voltage bilateral MOSswitches and low-power CMOS logic to provide efficientcontrol of high-voltage analog signals.
上傳時間： 2013-10-09
上傳用戶：yepeng139
Abstract: Class D amplifiers are typically very efficient, making them ideal candidates for portable applications that require longbattery life and low thermal dissipation. However, electromagnetic interference (EMI) is an issue that commonly accompanies theClass D switching topology. Active-emissions limiting reduces radiated emissions and enables "filterless" operation, allowingdesigners to create small, efficient portable applications with low EMI.
上傳時間： 2013-11-23
上傳用戶：哈哈hah
Abstract: Build a composite amplifier featuring high gain, wide bandwidth, good DC accuracy and low distortion
上傳時間： 2014-12-23
上傳用戶：JasonC
