validate Subsystem Compatibility - Source Code
標(biāo)簽: Compatibility Subsystem validate Source
上傳時(shí)間: 2016-06-11
上傳用戶:784533221
Use this program to decode the Manchester Code of the RFID. validate the accessibility of detected card. Including a keypad controller, generally a all in one card access reader.
標(biāo)簽: the accessibility Manchester validate
上傳時(shí)間: 2013-12-19
上傳用戶:yoleeson
struts validate框架示例,并附有文字說明,適合初學(xué)者,是學(xué)習(xí)struts的好資料
上傳時(shí)間: 2014-01-05
上傳用戶:fxf126@126.com
提供了基礎(chǔ)的validate驗(yàn)證,可以在struts的formbean中使用
標(biāo)簽: validate
上傳時(shí)間: 2014-01-15
上傳用戶:lvzhr
Java-validate AD NT account
標(biāo)簽: Java-validate account AD NT
上傳時(shí)間: 2017-03-04
上傳用戶:cylnpy
驗(yàn)證規(guī)則 jquery-validate
標(biāo)簽: jquery-validate
上傳時(shí)間: 2014-01-02
上傳用戶:lizhizheng88
It fetches lists of proxy from Internet and check/validate them.
標(biāo)簽: Internet validate fetches check
上傳時(shí)間: 2017-04-19
上傳用戶:GavinNeko
validate Baud rate s accuracy this program will show from FF to 00.
標(biāo)簽: validate accuracy program Baud
上傳時(shí)間: 2013-12-28
上傳用戶:gaome
This paper introduces an affine invariant of trapezia, and the explicit constraint equation between the intrinsic matrix of a camera and the similarity invariants of a trapezium are established using the affine invariant. By this constraint, the inner parameters, motion parameters of the cameras and the similarity invariants of trapezia can be linearly determined using some prior knowledge on the cameras or the trapezia. The proposed algorithms have wide applicability since parallel lines are not rare in many scenes. Experimental results validate the proposed approaches. This work presents a unifying framework based on the parallelism constraint, and the previous methods based on the parallelograms or the parallelepipeds can be integrated into this framework. Key words: invariant parallelism constraint camera calibration 3D reconstruction
標(biāo)簽: introduces constraint invariant explicit
上傳時(shí)間: 2014-01-16
上傳用戶:6546544
This document provides guidelines for integrating a discrete high speed USB host controller onto a fourlayer desktop motherboard. The material covered can be broken into three main categories: Board design guidelines, EMI/ESD guidelines and front panel USB guidelines. Section 1.1 Background provides an explanation of the routing experiments and testing performed to validate the feasibility of 480 Megabits per second on an actual motherboard. Section 7 contains a design checklist that lists each design recommendation described in this document. High speed USB operation is described in the USB 2.0 Specification (http://www.usb.org/developers/docs.html).
標(biāo)簽: integrating controller guidelines document
上傳時(shí)間: 2013-11-27
上傳用戶:電子世界
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