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SharpPrivacy - OpenPGP for C#:
SharpPrivacy is an OpenPGP implementation in C#. It can be used to encrypt and sign data, created OpenPGP compatible keys, and a lot more. This article explains how to use the library in your own .NET application or webpage to encrypt, sign, decrypt or verify OpenPGP messages.
In a preemptive priority based RTOS, priority inversion
problem is among the major sources of deadline
violations. Priority inheritance protocol is one of the
approaches to reduce priority inversion. Unfortunately,
RTOS like uC/OS can’t support priority inheritance
protocol since it does not allow kernel to have multiple
tasks at the same priority. Although it has different ways
to avoid priority inversion such as priority ceiling
protocol, developers still have some difficulties in
programming real time applications with it. In this paper,
we redesign the uC/OS kernel to provide the ability to
support round robin scheduling and implement priority
inheritance semaphore on the modified kernel. As result,
we port new kernel with priority inheritance semaphore to
evaluation board, and evaluate the execution time of each
of the kernel service as well as verify the operations of
our implementation.
北京大學ACM比賽題目
In 1742, Christian Goldbach, a German amateur mathematician, sent a letter to Leonhard Euler in which he made the following conjecture:
Every even number greater than 4 can be
written as the sum of two odd prime numbers.
For example:
8 = 3 + 5. Both 3 and 5 are odd prime numbers.
20 = 3 + 17 = 7 + 13.
42 = 5 + 37 = 11 + 31 = 13 + 29 = 19 + 23.
Today it is still unproven whether the conjecture is right. (Oh wait, I have the proof of course, but it is too long to write it on the margin of this page.)
Anyway, your task is now to verify Goldbach s conjecture for all even numbers less than a million.
It is an experimental testing for python M2Crypto module. M2Crypto is not well document. User may not know how to use SHA256 when signing and verify with RSA. It also have not enough document to show how to use DES to encrypt and decrypt. Here also includes source codes for performance evaluation of the algorithms. This experimental program explore all this issue and may be helpful for some one who using python for doing encryption with RSA and DES.
Use the links below to download a source distribution of Ant from one of our mirrors. It is good practice to verify the integrity of the distribution files, especially if you are using one of our mirror sites. In order to do this you must use the signatures from our main distribution directory.
Ant is distributed as zip, tar.gz and tar.bz2 archives - the contents are the same. Please note that the tar.* archives contain file names longer than 100 characters and have been created using GNU tar extensions. Thus they must be untarred with a GNU compatible version of tar.
If you do not see the file you need in the links below, please see the master distribution directory or, preferably, its mirror.
LXI Standards Documents are developed within the LXI Consortium and LXI Technical Working
Groups sponsored by the LXI Consortium Board of Directors. The LXI Consortium develops its
standards through a consensus development process modeled after the American National Standards
Institute, which brings together volunteers representing varied viewpoints and interests to achieve
the final product. Volunteers are not necessarily members of the Consortium and serve without
compensation. While the LXI Consortium administers the process and establishes rules to promote
fairness in the consensus development process, the LXI Consortium does not exhaustively evaluate,
test, or verify the accuracy of any of the information contained in its standards.
In term project, we will take the baseline JPEG codec in ARM-based platform system as an example to practice the design flow in SoC. We divide the project into three
parts, and the goal of each part is described as follow.
Part I: Design a baseline JPEG software codec in C/C++ and port it to ARM core,(ARM7TDMI, ARM720T, or ARM922T.)
Part II: Make use of virtual prototype to integrate/verify the hardware and software.
Part III: verify your soft IP in target environment.
This paper shows the development of a 1024-point
radix-4 FFT VHDL core for applications in hardware signal processing, targeting low-cost FPGA technologies. The developed core is targeted into a Xilinx廬 Spartan鈩?3 XC3S200 FPGA with the inclusion of a VGA display interface and an external 16-bit data acquisition system for performance evaluation purposes. Several tests were performed in order to verify FFT core functionality, besides the time performance analysis highlights the core advantages over commercially available DSPs and Pentium-based PCs. The core is compared with similar third party IP cores targeting resourceful FPGA technologies. The novelty of this work is to provide a lowcost, resource efficient core for spectrum analysis
applications.