asfpga is an assembler written for use in FPGA design. It can be easily modified for your instruction set. The ultimate goal of this software is to allow a FPGA designer to easily write assembly code for a custom instruction set.
標簽： instructio assembler for modified
上傳時間： 2014-01-06
上傳用戶：xinyuzhiqiwuwu
jSearch - turns search Engines into FIND engines - Programming in JAVA Copyright (C) 1999-2009 Hunt Lin This program is free software you can redistribute it and/or modifyit under the terms of the GNU General Public License as published bythe Free Software Foundation either version 2 of the License, or(at your option) any later version. This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY without even the implied warranty ofMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See theGNU General Public License for more details. You should have received a copy of the GNU General Public Licensealong with this program if not, write to the Free SoftwareFoundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. Also add information on how to contact you by electronic and paper mail.
標簽： Programming Copyright jSearch Engines
上傳時間： 2017-02-10
上傳用戶：qoovoop
This text introduces the spirit and theory of hacking as well as the science behind it all it also provides some core techniques and tricks of hacking so you can think like a hacker, write your own hacks or thwart potential system attacks. 我記得好像的關于緩沖區溢出的
標簽： introduces the hacking science
上傳時間： 2014-08-14
上傳用戶：Breathe0125
In term project, we will take the baseline JPEG codec in ARM-based platform system as an example to practice the design flow in SoC. We divide the project into three parts, and the goal of each part is described as follow. Part I: Design a baseline JPEG software codec in C/C++ and port it to ARM core,(ARM7TDMI, ARM720T, or ARM922T.) Part II: Make use of virtual prototype to integrate/verify the hardware and software. Part III: Verify your soft IP in target environment.
標簽： ARM-based baseline platform project
上傳時間： 2017-02-15
上傳用戶：363186
Description The art galleries of the new and very futuristic building of the Center for Balkan Cooperation have the form of polygons (not necessarily convex). When a big exhibition is organized, watching over all of the pictures is a big security concern. Your task is that for a given gallery to write a program which finds the surface of the area of the floor, from which each point on the walls of the gallery is visible. On the figure 1. a map of a gallery is given in some co-ordinate system. The area wanted is shaded on the figure 2.
標簽： Description futuristic galleries the
上傳時間： 2017-02-17
上傳用戶：1427796291
All of Java s Input/Output (I/O) facilities are based on streams, which provide simple ways to read and write data of different types. Java provides many different kinds of streams, each with its own application. The universe of streams is divided into four large categories: input streams and output streams, for reading and writing binary data and readers and writers, for reading and writing textual (character) data. You re almost certainly familiar with the basic kinds of streams--but did you know that there s a CipherInputStream for reading encrypted data? And a ZipOutputStream for automatically compressing data? Do you know how to use buffered streams effectively to make your I/O operations more efficient? Java I/O, 2nd Edition has been updated for Java 5.0 APIs and tells you all you ever need to know about streams--and probably more.
標簽： facilities streams provide Output
上傳時間： 2013-12-17
上傳用戶：6546544
"Readers can pick up this book and become familiar with C++ in a short time. Stan has taken a very broad and complicated topic and reduced it to the essentials that budding C++ programmers need to know to write real programs. His case study is effective and provides a familiar thread throughout the book.
標簽： familiar Readers become short
上傳時間： 2014-01-19
上傳用戶：luke5347
Enhanced version of the Serial Peripheral Interface available on Motorola s MC68HC11 family of CPUs.Enhancements include a wider supported operating frequency range, 4deep read and write fifos, and programmable transfer count dependent interrupt generation. As with the SPI found in MC68HC11 processors the core features programmable clock phase [CPHA] and clock polarity [CPOL]. The core features an 8bit wishbone interface. Very simple, very small.
標簽： Peripheral Interface available Enhanced
上傳時間： 2014-12-06
上傳用戶：invtnewer
It contains a vhdl description of the external bus interface unit for 68000 processor. currently only read and write cycle are supported
標簽： description currently interface processor
上傳時間： 2017-03-16
上傳用戶：chenlong
VxWorks 6.6 BSP開發執導 This document describes, in general terms, the elements that make up a board support package [BSP], the requirements for a VxWorks BSP, and the general behavior of a BSP during the boot process. This document outlines the steps needed to port an existing BSP to a new hardware platform or to write a new VxWorks BSP for custom hardware using a reference BSP or template BSP as a starting point. It provides hints and tips for debugging a BSP and solving common BSP development problems. It also provides information on the BSP validation test suite [BSP VTS] that is used to assess the functionality of a VxWorks BSP.
標簽： describes document elements VxWorks
上傳時間： 2017-03-23
上傳用戶：磊子226
