計算校驗碼，格式為：G(X)=x8+X2+X+1,陪集碼為FFH，
上傳時間： 2015-08-30
上傳用戶：541657925
linux 簡單地說，Linux是一套免費使用和自由傳播的類Unix操作系統(tǒng)，它主要用于基于Intel x8 6系列CPU的計算機上。這個系統(tǒng)是由全世界各地的成千上萬的程序員設(shè)計和實現(xiàn)的。其目的是建立不受任何商品化軟件的版權(quán)制約的、全世界都能自由使用的Unix兼容產(chǎn)品
標簽： linux
上傳時間： 2016-02-14
上傳用戶：sqq
簡單地說，Linux是一套免費使用和自由傳播的類Unix操作系統(tǒng)，它主要用于基于Intel x8 6系列CPU的計算機上。這個系統(tǒng)是由全世界各地的成千上萬的程序員設(shè)計和實現(xiàn)的。其目的是建立不受任何商品化軟件的版權(quán)制約的、全世界都能自由使用的Unix兼容產(chǎn)品
標簽：
上傳時間： 2014-01-09
上傳用戶：jjj0202
注意：只有C代碼。串行驅(qū)動led顯示，一個74hc595位移寄存器驅(qū)動三極管驅(qū)動led位，兩個74hc595驅(qū)動led段，方式位5位x8段x2=10個數(shù)碼管5分頻，每次掃描時間位1.25ms
上傳時間： 2017-04-19
上傳用戶：yulg
64位:http://wm.makeding.com/iclk/?zoneid=1671&uid=1428 32位：http://wm.makeding.com/iclk/?zoneid=1672&uid=1428 復制網(wǎng)址到瀏覽器即可下載
上傳時間： 2015-08-21
上傳用戶：dumpsoft
步驟一 按快捷鍵Ctrl+N新建A4大小空白橫向文檔，并填充顏色為淺綠色。 步驟二 選擇工具箱中的“貝塞爾工具”繪制荷葉，使用“形狀工具”進行節(jié)點調(diào)整。填充輪廓色和填充色。 步驟三 在工具箱中選擇“網(wǎng)狀填充工具”設(shè)置網(wǎng)格中的行列數(shù)為3*3，鼠標框選中間4個節(jié)點，統(tǒng)一填充顏色為（R：0，G:153，B：51）。 步驟四 選擇“貝塞爾工具”繪制荷葉葉脈，由于所畫線條是不連接的單一曲線，所以繪制時可以借助鍵盤上的“空格”鍵來進行切換。 步驟五 接著利用“貝塞爾工具”依照前面的方法繪制出不同形態(tài)的葉子并Ctrl+G群組。 步驟六 用“貝塞爾工具”繪制荷葉莖部，按F12鍵調(diào)整曲線寬度為3，自定義顏色值為（C：70，M:0，Y：100，K：0），然后執(zhí)行“對象”→“將輪廓轉(zhuǎn)換為對象”命令，再次按F12鍵添加寬度為細線的（C：78，M:19，Y：76，K：0）的顏色值，調(diào)整順序到后層。 步驟七 選擇一片群組合過的葉子，進行位圖模糊處理，放在畫面后面，達到近實遠虛的視覺效果。 步驟八 選擇“貝塞爾工具”繪制花瓣，借助網(wǎng)狀填充工具填充粉色到洋紅色，按Ctrl鍵繪制一個正圓，按F12把圓加粗，然后執(zhí)行“對象”→“將輪廓轉(zhuǎn)換為對象”命令（Ctrl+Shift+Q）。 步驟九 繪制各種形態(tài)的荷花造型，并群組圖形。
上傳時間： 2018-08-03
上傳用戶：cjmktt
常用芯片DIP SOT SOIC QFP電阻電容二極管等3D模型庫 3D視圖封裝庫 STEP后綴三維視圖（154個）:050-9.STEP0805R.STEP1001-1.STEP1001-2.STEP1001-3.STEP1001-4.STEP1001-5.STEP1001-6.STEP1001-7.STEP1001-8.STEP103_1KV.STEP10X5JT.STEP1206R.STEP13PX2.STEP15PX2.STEP20P插針.STEP25V1000UF.STEP3296W.STEP35V2200UF.STEP3mmLED.STEP3mmLEDH.STEP3X3可調(diào)電阻.STEP400V0.1UF.STEP455.STEP630V0.1UF.STEP7805.STEP8P4R.STEPAXIAL-0.2-0.125W.STEPAXIAL-0.4-0.25W.STEPaxial-0.6-2W.STEPB-3528.STEPC-0805.STEPC06x18.STEPCAP-6032.STEPCH3.96 X2.STEPCH3.96-3P.STEPD-PAK.STEPDB25.STEPDC-30.STEPDIP14.STEPDIP16.STEPDIP6.STEPDIP8.STEPDO-214AA.STEPDO-214AB.STEPDO-214AC.STEPDO-41.STEPDO-41Z.STEPFMQ.STEPGNR14D.STEPH9700.STEPILI4981.STEPIN4007.STEPIN5408.STEPJP051-6P6C_02.STEPJQC-3F.STEPJS-1132-10.STEPJS-1132-11.STEPJS-1132-12.STEPJS-1132-13.STEPJS-1132-14.STEPJS-1132-15.STEPJS-1132-2.STEPJS-1132-3.STEPJS-1132-4.STEPJS-1132-5.STEPJS-1132-6.STEPJS-1132-7.STEPJS-1132-8.STEPJS-1132-9.STEPJS-1132R-2.STEPJS-1132R-3.STEPJS-1132R-4.STEPJS-1132R-5.STEPJS-1132R-6.STEPJS-1132R-7.STEPJS-1132R-8.STEPJZC-33F.STEPKBP210.STEPKE2108.STEPKF2510 x8.STEPKF301.STEPKF301x3.STEPKSD-9700.STEPLED5_BLUE.STEPLED5_GRE.STEPLED5_RED.STEPLED5_YEL.STEPLFCSP_WQ.STEPLQFP100.STEPLQFP48.STEPMC-146.STEPmolex-22-27-2021.STEPmolex-22-27-2031.STEPmolex-22-27-2041.STEPmolex-22-27-2051.STEPmolex-22-27-2061.STEPmolex-22-27-2071.STEPmolex-22-27-2081.STEPMSOP10.STEPMSOP8.STEPPA0630NOXOX-HA1.STEPPIN10.STEPPIN24.STEPPIN24A.STEPR 0805.STEPR0402.STEPR0603.STEPR0805.STEPR1206.STEPRA-15.STEPRA-20.STEPRS808.STEPSIP-3-3.96 22-27-2031.STEPSL-B.STEPSL-D.STEPSL-E.STEPSL-G.STEPSL-H.STEPSOD-123.STEPSOD-323.STEPSOD-523.STEPSOD-723.STEPSOD-80.STEPSOIC-8.STEPSOP-4.STEPSOP14.STEPSOP16.STEPSOP18.STEPSOT-89.STEPSOT223.STEPSOT23-3.STEPSOT23-5.STEPSSOP28.STEPTAJ-A.STEPTAJ-B.STEPTAJ-C.STEPTAJ-D.STEPTAJ-E.STEPTAJ-R.STEPTHB6064H.STEPTO-126.STEPTO-126X.STEPTO-220.STEPTO-247.STEPTO-252-3L.STEPTOSHIBA_11-4C1.STEPTSSOP-8.STEPTSSOP14-BOTTON.STEPTSSOP14.STEPTSSOP28.STEPUSB-A.STEPUSB-B.STEPWT.STEP
標簽： 芯片 dip sot soic qfp 電阻 電容 二極管 封裝
上傳時間： 2021-11-21
上傳用戶：XuVshu
1. Scope ......................................................................................................................................................................... 12. DDR4 SDRAM Package Pinout and Addressing ....................................................................................................... 22.1 DDR4 SDRAM Row for X4,x8 and X16 ................................................................................................................22.2 DDR4 SDRAM Ball Pitch........................................................................................................................................22.3 DDR4 SDRAM Columns for X4,x8 and X16 ..........................................................................................................22.4 DDR4 SDRAM X4/8 Ballout using MO-207......................................................................................................... 22.5 DDR4 SDRAM X16 Ballout using MO-207.............................................................................................................32.6 Pinout Description ..................................................................................................................................................52.7 DDR4 SDRAM Addressing.....................................................................................................................................73. Functional Description ...............................................................................................................................................83.1 Simplified State Diagram ....................................................................................................................................83.2 Basic Functionality..................................................................................................................................................93.3 RESET and Initialization Procedure .....................................................................................................................103.3.1 Power-up Initialization Sequence .............................................................................................................103.3.2 Reset Initialization with Stable Power ......................................................................................................113.4 Register Definition ................................................................................................................................................123.4.1 Programming the mode registers .............................................................................................................123.5 Mode Register ......................................................................................................................................................134. DDR4 SDRAM Command Description and Operation ............................................................................................. 244.1 Command Truth Table ..........................................................................................................................................244.2 CKE Truth Table ...................................................................................................................................................254.3 Burst Length, Type and Order ..............................................................................................................................264.3.1 BL8 Burst order with CRC Enabled .........................................................................................................264.4 DLL-off Mode & DLL on/off Switching procedure ................................................................................................274.4.1 DLL on/off switching procedure ...............................................................................................................274.4.2 DLL “on” to DLL “off” Procedure ..............................................................................................................274.4.3 DLL “off” to DLL “on” Procedure ..............................................................................................................284.5 DLL-off Mode........................................................................................................................................................294.6 Input Clock Frequency Change ............................................................................................................................304.7 Write Leveling.......................................................................................................................................................314.7.1 DRAM setting for write leveling & DRAM termination function in that mode ............................................324.7.2 Procedure Description .............................................................................................................................334.7.3 Write Leveling Mode Exit .........................................................................................................................34
標簽： DDR4
上傳時間： 2022-01-09
上傳用戶：
【資源描述】:在VC709上跑PCIe x8例程，RedHat Linux 。發(fā)現(xiàn)官方例程的驅(qū)動有些地方不適應于新版Linux了，做了一點修改，同時分享一下心得：首先PCIe例程一定要固化，并且一定要在服務器上電之前給VC709上電，否則用lspci命令是看不到VC709被系統(tǒng)識別的！！！！
上傳時間： 2022-06-17
上傳用戶：
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