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Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver

Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver

標(biāo)簽： Implementation Recovery Receiver Software

上傳時間： 2013-09-05

上傳用戶：panpanpan
FPGA in the software radio

FPGA in the software radio

標(biāo)簽： software radio FPGA the

上傳時間： 2013-09-06

上傳用戶：lina2343
simulation software which after compile from microcontroller software

simulation software which after compile from microcontroller software

標(biāo)簽： software microcontroller simulation compile

上傳時間： 2013-09-22

上傳用戶：hulee
開關(guān)電源EMI設(shè)計(英文版)

Integrated EMI/Thermal Design forSwitching Power SuppliesWei ZhangThesis submitted to the Faculty of theVirginia Polytechnic Institute and State Universityin partial fulfillment of the requirements for the degree of Integrated EMI/Thermal Design forSwitching Power SuppliesWei Zhang(ABSTRACT)This work presents the modeling and analysis of EMI and thermal performancefor switch power supply by using the CAD tools. The methodology and design guidelinesare developed.By using a boost PFC circuit as an example, an equivalent circuit model is builtfor EMI noise prediction and analysis. The parasitic elements of circuit layout andcomponents are extracted analytically or by using CAD tools. Based on the model, circuitlayout and magnetic component design are modified to minimize circuit EMI. EMI filtercan be designed at an early stage without prototype implementation.In the second part, thermal analyses are conducted for the circuit by using thesoftware Flotherm, which includes the mechanism of conduction, convection andradiation. Thermal models are built for the components. Thermal performance of thecircuit and the temperature profile of components are predicted. Improved thermalmanagement and winding arrangement are investigated to reduce temperature.In the third part, several circuit layouts and inductor design examples are checkedfrom both the EMI and thermal point of view. Insightful information is obtained.

標(biāo)簽： EMI 開關(guān)電源英文

上傳時間： 2013-11-10

上傳用戶：1595690
單片機P0口的片外數(shù)據(jù)存儲器擴展

單片機作為一種微型計算機，其內(nèi)部具有一定的存儲單元（8031除外），但由于其內(nèi)部存儲單元及端口有限，很多情況下難以滿足實際需求。為此介紹一種新的擴展方法，將數(shù)據(jù)線與地址線合并使用，通過軟件控制的方法實現(xiàn)數(shù)據(jù)線與地址線功能的分時轉(zhuǎn)換，數(shù)據(jù)線不僅用于傳送數(shù)據(jù)信號，還可作為地址線、控制線，用于傳送地址信號和控制信號，從而實現(xiàn)單片機與存儲器件的有效連接。以單片機片外256KB數(shù)據(jù)存儲空間的擴展為例，通過該擴展方法，僅用10個I/O端口便可實現(xiàn)，與傳統(tǒng)的擴展方法相比，可節(jié)約8個I/O端口。 Abstract: As a micro-computer,the SCM internal memory has a certain units(except8031),but because of its internal storage units and the ports are limited,in many cases it can not meet the actual demand.So we introduced a new extension method,the data line and address lines combined through software-controlled approach to realize the time-conversion functions of data lines and address lines,so the data lines not only transmited data signals,but also served as address lines and control lines to transmit address signals and control signals,in order to achieve an effective connection of microcontroller and memory chips.Take microcontroller chip with256KB of data storage space expansion as example,through this extension method,with only10I/O ports it was achieved,compared with the traditional extension methods,this method saves8I/O ports.

標(biāo)簽： 單片機 P0口數(shù)據(jù)存儲器擴展

上傳時間： 2014-12-26

上傳用戶：adada
MAX7456在可視倒車?yán)走_(dá)中的應(yīng)用

為解決傳統(tǒng)可視倒車?yán)走_(dá)視頻字符疊加器結(jié)構(gòu)復(fù)雜，可靠性差，成本高昂等問題，在可視倒車?yán)走_(dá)設(shè)計中采用視頻字符發(fā)生器芯片MAX7456。該芯片集成了所有用于產(chǎn)生用戶定義OSD，并將其插入視頻信號中所需的全部功能，僅需少量的外圍阻容元件即可正常工作。給出了以MAX7456為核心的可視倒車?yán)走_(dá)的軟、硬件實現(xiàn)方案及設(shè)計實例。該方案具有電路結(jié)構(gòu)簡單、價格低廉、符合人體視覺習(xí)慣的特點。經(jīng)實際裝車測試，按該方案設(shè)計的可視倒車?yán)走_(dá)視場清晰、提示字符醒目、工作可靠，可有效降低駕駛員倒車時的工作強度、減少倒車事故的發(fā)生。 Abstract: A new video and text generation chip，MAX7456，was used in the design of video parking sensor in order to simplify system structure，improve reliability and reduce cost. This chip included all the necessary functions to generate user-defined OSDs and to add them into the video signals. It could be put into work with addition of just a small number of resistances and capacitors. This paper provided software and hardware implementation solutions and design example based on the chip. The system had the characteristics of simplicity in circuit structure，lower cost，and comfort for the nature of human vision. Loading road test demonstrates high video and text display quality and reliable performance，which makes the driver easy to see backward and reduces chance of accidents.

標(biāo)簽： 7456 MAX 可視倒車中的應(yīng)用

上傳時間： 2013-12-10

上傳用戶：qiaoyue
AD9859芯片資料

FEATURES400 MSPS internal clock speedIntegrated 10-bit DAC32-bit tuning wordPhase noise ≤ –120 dBc/Hz @ 1 kHz offset (DAC output)Excellent dynamic performance>75 dB SFDR @ 160 MHz (±100 kHz offset) AOUTSerial I/O control1.8 V power supplySoftware and hardware controlled power-down48-lead TQFP/EP packageSupport for 5 V input levels on most digital inputsPLL REFCLK multiplier (4× to 20×)Internal oscillator; can be driven by a single crystalPhase modulation capabilityMultichip synchronization

標(biāo)簽： 9859 AD 芯片資料

上傳時間： 2014-12-04

上傳用戶：axin881314
MPLAB 6.XX及PICC18安裝使用簡介

MPLAB 6.XX及PICC18安裝使用簡介 MPLAB的安裝軟件可以從微芯公司網(wǎng)站上下載，本人使用的是MPLABV6.43版本，其余版本的操作與此相同，推薦使用MPLABV6.30以后的軟件版本。

標(biāo)簽： MPLAB PICC 18 XX

上傳時間： 2014-01-18

上傳用戶：fairy0212
DTMF Decoding with a PIC16xxx

This application note describes how to decode standard DTMF tones using the minimum number of external discrete components and a PIC. The two examples use a PIC which has an 8 bit timer and either a comparator or an ADC, although it can be modified for use on a PIC which has only digital I/O. The Appendices have example code for the 16C662 (with comparator) and 16F877 (using the ADC). As the majority of the Digital Signal Processing is done in software, little is required in the way of external signal conditioning. Software techniques are used to model the individual elements of a DTMF Decoder IC.

標(biāo)簽： Decoding DTMF with PIC

上傳時間： 2013-11-21

上傳用戶：zhaoke2005
ADC Oversampling Techniques fo

Luminary Micro provides an analog-to-digital converter (ADC) module on some members of theStellaris microcontroller family. The hardware resolution of the ADC is 10 bits; however, due to noiseand other accuracy-diminishing factors, the true accuracy is less than 10 bits. This application noteprovides a software-based oversampling technique, resulting in an improved Effective Number OfBits (ENOB) in the conversion result. This document describes methods of oversampling an inputsignal, and the impact on precision and overall system performance.

標(biāo)簽： Oversampling Techniques ADC fo

上傳時間： 2013-12-17

上傳用戶：zhyiroy