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• vhdl basic vending machine.免費(fèi)下載

  資源簡(jiǎn)介：vhdl basic vending machine.

  標(biāo)簽： vending machine basic vhdl

  上傳時(shí)間： 2015-08-11

  上傳用戶：qwe1234

• gum vending machine implementation in vhdl, state machine implementation,免費(fèi)下載

  資源簡(jiǎn)介：gum vending machine implementation in vhdl, state machine implementation,

  標(biāo)簽： implementation machine vending state

  上傳時(shí)間： 2017-07-14

  上傳用戶：zycidjl

• a simple PC Dos program for getting DEX data out of the vending machine s DEX port. compile under Bo免費(fèi)下載

  資源簡(jiǎn)介：a simple PC Dos program for getting DEX data out of the vending machine s DEX port. compile under Borland C++ 3.1

  標(biāo)簽： DEX machine program vending

  上傳時(shí)間： 2016-12-04

  上傳用戶：獨(dú)孤求源

• rc5 encryption- rc5 encryption using vhdl, using state machine, more detailed description can be fou免費(fèi)下載

  資源簡(jiǎn)介：rc5 encryption- rc5 encryption using vhdl, using state machine, more detailed description can be found in ieee papers.

  標(biāo)簽： encryption using description rc5

  上傳時(shí)間： 2013-12-22

  上傳用戶：13517191407

• RC5 decryption algorithm implementation, using vhdl, with state machine implementation, use ieee pap免費(fèi)下載

  資源簡(jiǎn)介：RC5 decryption algorithm implementation, using vhdl, with state machine implementation, use ieee papers for more detailed description.

  標(biāo)簽： implementation decryption algorithm machine

  上傳時(shí)間： 2014-01-06

  上傳用戶：bruce5996

• rc5 key expansion algorithm implementation in vhdl, using state machine too. use ieee papers for mor免費(fèi)下載

  資源簡(jiǎn)介：rc5 key expansion algorithm implementation in vhdl, using state machine too. use ieee papers for more detailed description

  標(biāo)簽： implementation expansion algorithm machine

  上傳時(shí)間： 2017-07-14

  上傳用戶：lyy1234

• java vending machine source code免費(fèi)下載

  資源簡(jiǎn)介：java vending machine source code

  標(biāo)簽： machine vending source java

  上傳時(shí)間： 2017-07-23

  上傳用戶：aix008

• RTL in Verilog (vending machine)免費(fèi)下載

  資源簡(jiǎn)介：RTL in Verilog (vending machine)

  標(biāo)簽： machine Verilog vending RTL

  上傳時(shí)間： 2013-12-17

  上傳用戶：洛木卓

• Verilog and vhdl狀態(tài)機(jī)設(shè)計(jì)免費(fèi)下載

  資源簡(jiǎn)介：Verilog and vhdl狀態(tài)機(jī)設(shè)計(jì)，英文pdf格式 State machine design techniques for Verilog and vhdl Abstract : Designing a synchronous finite state Another way of organizing a state machine (FSM) is a common task for a digital logic only one l...

  標(biāo)簽： Verilog vhdl and 狀態(tài)

  上傳時(shí)間： 2013-12-19

  上傳用戶：change0329

• 1. Learn the basic constructs of vhdl 2. Learn the modeling structure of vhdl 3. Understand the de免費(fèi)下載

  資源簡(jiǎn)介：1. Learn the basic constructs of vhdl 2. Learn the modeling structure of vhdl 3. Understand the design environments – Simulation – Synthesis

  標(biāo)簽： the Learn vhdl Understand

  上傳時(shí)間： 2017-02-18

  上傳用戶：love_stanford

• simple ATM [Automatic Teller machine] system the basic functions Login including write-offs, inquiri免費(fèi)下載

  資源簡(jiǎn)介：simple ATM [Automatic Teller machine] system the basic functions Login including write-offs, inquiries, deposits, withdrawals and alter the code. Simulation of ATM terminal users logged in, their account numbers and passwords through the AT...

  標(biāo)簽： write-offs Automatic functions including

  上傳時(shí)間： 2014-01-20

  上傳用戶：semi1981

• State machine of Motor implemented in vhdl.免費(fèi)下載

  資源簡(jiǎn)介：State machine of Motor implemented in vhdl.

  標(biāo)簽： implemented machine State Motor

  上傳時(shí)間： 2013-12-17

  上傳用戶：sclyutian

• a simple ebook to familiarize basic concepts of vhdl免費(fèi)下載

  資源簡(jiǎn)介：a simple ebook to familiarize basic concepts of vhdl

  標(biāo)簽： familiarize concepts simple ebook

  上傳時(shí)間： 2014-01-20

  上傳用戶：lx9076

• vhdl source code for test machine.免費(fèi)下載

  資源簡(jiǎn)介：vhdl source code for test machine.

  標(biāo)簽： machine source vhdl code

  上傳時(shí)間： 2014-12-08

  上傳用戶：lhc9102

• State machine Coding Styles for Synthesis免費(fèi)下載

  資源簡(jiǎn)介：? 本文論述了狀態(tài)機(jī)的verilog編碼風(fēng)格,以及不同編碼風(fēng)格的優(yōu)缺點(diǎn)，Steve Golson's 1994 paper, "State machine Design Techniques for Verilog and vhdl" [1], is agreat paper on state machine design using Verilog, vhdl and Synopsys tools. Steve's ...

  標(biāo)簽： Synthesis machine Coding Styles

  上傳時(shí)間： 2013-10-15

  上傳用戶：dancnc

• 基于vhdl的微型打印機(jī)控制器設(shè)計(jì)免費(fèi)下載

  資源簡(jiǎn)介：介紹基于vhdl的微型打印機(jī)控制器的設(shè)計(jì)。論述了微型打印機(jī)的基本原理，以及實(shí)現(xiàn)控制器的vhdl語(yǔ)言設(shè)計(jì)。打印機(jī)的數(shù)據(jù)來(lái)自系統(tǒng)中的存儲(chǔ)模塊，根據(jù)需要控制打印。該微型打印機(jī)控制器可取代傳統(tǒng)的微型打印機(jī),且抗干擾性好,可靠性高，具有較強(qiáng)的移植性，稍加改動(dòng)就...

  標(biāo)簽： vhdl 微型打印機(jī) 制器設(shè)計(jì)

  上傳時(shí)間： 2013-11-03

  上傳用戶：dudu1210004

• State machine Coding Styles for Synthesis免費(fèi)下載

  資源簡(jiǎn)介：? 本文論述了狀態(tài)機(jī)的verilog編碼風(fēng)格,以及不同編碼風(fēng)格的優(yōu)缺點(diǎn)，Steve Golson's 1994 paper, "State machine Design Techniques for Verilog and vhdl" [1], is agreat paper on state machine design using Verilog, vhdl and Synopsys tools. Steve's ...

  標(biāo)簽： Synthesis machine Coding Styles

  上傳時(shí)間： 2013-10-12

  上傳用戶：sardinescn

• State.machine.Coding.Styles.for.Synthesis（狀態(tài)機(jī)免費(fèi)下載

  資源簡(jiǎn)介：State.machine.Coding.Styles.for.Synthesis（狀態(tài)機(jī)，英文,vhdl）

  標(biāo)簽： Synthesis machine Coding Styles

  上傳時(shí)間： 2013-12-22

  上傳用戶：vodssv

• This file contains a selection of vhdl source files which serve to illustrate the diversity and powe免費(fèi)下載

  資源簡(jiǎn)介：This file contains a selection of vhdl source files which serve to illustrate the diversity and power of the language when used to describe various types of hardware. The examp terms of basic logic gates, to more complex systems, such as a...

  標(biāo)簽： illustrate diversity selection contains

  上傳時(shí)間： 2016-06-06

  上傳用戶：yimoney

• The iputils package contains ping, a basic networking tool. The ping command sends a series of ICMP免費(fèi)下載

  資源簡(jiǎn)介：The iputils package contains ping, a basic networking tool. The ping command sends a series of ICMP protocol ECHO_REQUEST packets to as pecified network host and can tell you if that machine is alive and receiving network traffic.ipv6calc i...

  標(biāo)簽： ping networking The contains

  上傳時(shí)間： 2014-08-25

  上傳用戶：zhichenglu

• 有版權(quán)爭(zhēng)議的內(nèi)容和木馬病毒代碼 開發(fā)環(huán)境： 請(qǐng)選擇 Visual C++ Visual basic DOS Unix_Linux C++ Builder Java Windows_Unix免費(fèi)下載

  資源簡(jiǎn)介：有版權(quán)爭(zhēng)議的內(nèi)容和木馬病毒代碼 開發(fā)環(huán)境： 請(qǐng)選擇 Visual C++ Visual basic DOS Unix_Linux C++ Builder Java Windows_Unix Delphi C-C++ PHP-PERL PHP Perl Python HTML Asm Pascal Borland C++ 其他 多平臺(tái) C++ VFP SQL PDF TEXT WORD VBScript Java...

  標(biāo)簽： Visual Windows_Unix Unix_Linux Builder

  上傳時(shí)間： 2013-12-08

  上傳用戶：PresidentHuang

• with this rar file i am sending five source codes in vhdl for xor gate,xor gate using tristae gate,e免費(fèi)下載

  資源簡(jiǎn)介：with this rar file i am sending five source codes in vhdl for xor gate,xor gate using tristae gate,electronic voting machine,mod 16 counter,jk flip flop.please accept these codes and make me member of this site.so that i can download code f...

  標(biāo)簽： gate xor sending tristae

  上傳時(shí)間： 2013-12-18

  上傳用戶：wcl168881111111

• AdaBoost, Adaptive Boosting, is a well-known meta machine learning algorithm that was proposed by Yo免費(fèi)下載

  資源簡(jiǎn)介：AdaBoost, Adaptive Boosting, is a well-known meta machine learning algorithm that was proposed by Yoav Freund and Robert Schapire. In this project there two main files 1. ADABOOST_tr.m 2. ADABOOST_te.m to traing and test a user-cod...

  標(biāo)簽： well-known algorithm AdaBoost Adaptive

  上傳時(shí)間： 2014-01-15

  上傳用戶：qiaoyue

• Designing a synchronous finite state machine (FSM) is a common task for a digital logic engineer. T免費(fèi)下載

  資源簡(jiǎn)介：Designing a synchronous finite state machine (FSM) is a common task for a digital logic engineer. This paper discusses a variety of issues regarding FSM design using Synopsys Design Compiler. Verilog and vhdl coding styles are presented...

  標(biāo)簽： synchronous Designing engineer digital

  上傳時(shí)間： 2014-01-17

  上傳用戶：dreamboy36

• vhdl硬件描述語(yǔ)言與數(shù)字邏輯電路設(shè)計(jì)免費(fèi)下載

  資源簡(jiǎn)介：vhdl硬件描述語(yǔ)言與數(shù)字邏輯電路設(shè)計(jì)

  標(biāo)簽： vhdl 硬件描述語(yǔ)言 數(shù)字邏輯 電路設(shè)計(jì)

  上傳時(shí)間： 2013-05-19

  上傳用戶：eeworm

• Visual basic.NET進(jìn)銷存程序設(shè)計(jì)免費(fèi)下載

  資源簡(jiǎn)介：Visual basic.NET進(jìn)銷存程序設(shè)計(jì)

  標(biāo)簽： Visual basic NET 進(jìn)銷

  上傳時(shí)間： 2013-07-06

  上傳用戶：eeworm

• vhdl硬件描述語(yǔ)言 e文 PDF版免費(fèi)下載

  資源簡(jiǎn)介：vhdl硬件描述語(yǔ)言 e文 PDF版

  標(biāo)簽： vhdl 硬件描述語(yǔ)言

  上傳時(shí)間： 2013-04-15

  上傳用戶：eeworm

• vhdl程序?qū)嵗? .PDF免費(fèi)下載

  資源簡(jiǎn)介：vhdl程序?qū)嵗? .PDF

  標(biāo)簽： vhdl 上傳時(shí)間： 2013-06-02

  上傳用戶：eeworm

• vhdl語(yǔ)言100例詳解免費(fèi)下載

  資源簡(jiǎn)介：vhdl語(yǔ)言100例詳解

  標(biāo)簽： vhdl 100 語(yǔ)言

  上傳時(shí)間： 2013-06-05

  上傳用戶：eeworm

• 可編程邏輯系統(tǒng)的vhdl設(shè)計(jì)技術(shù) .PDF免費(fèi)下載

  資源簡(jiǎn)介：可編程邏輯系統(tǒng)的vhdl設(shè)計(jì)技術(shù) .PDF

  標(biāo)簽： vhdl 可編程 邏輯系統(tǒng)

  上傳時(shí)間： 2013-07-22

  上傳用戶：eeworm