phase frequency detector verilog
資源簡(jiǎn)介:phase frequency detector verilog
上傳時(shí)間: 2017-06-04
上傳用戶:csgcd001
資源簡(jiǎn)介:script for generting transmit waveforms in a minimum shift keying, a form of continuous phase frequency shift keying
上傳時(shí)間: 2016-11-30
上傳用戶:ANRAN
資源簡(jiǎn)介:This code is used for modeling frequency response and phase change of accelerometer.
上傳時(shí)間: 2013-12-18
上傳用戶:源弋弋
資源簡(jiǎn)介:This paper investigates the design of joint frequency offset and carrier phase estimation of a multi-frequency time division multiple access (MF-TDMA) demodulator that is applied to a digital video broadcasting—return channel system via...
上傳時(shí)間: 2015-12-30
上傳用戶:ls530720646
資源簡(jiǎn)介:ML Estimation of frequency, phase, and amplitude of a sinusoid from discrete time samples MLEsim.m
上傳時(shí)間: 2014-12-07
上傳用戶:dianxin61
資源簡(jiǎn)介::介紹了一種基于數(shù)字信號(hào)處理器(DSP)的移相調(diào)頻(phase-Shifted and frequency-Varied,PSFV)PWM控制 逆變電源,給出了主電路拓?fù)浣Y(jié)構(gòu),分析了其控制原理并設(shè)計(jì)了其控制程序流程圖。新穎的PSFV 控制能夠?qū)崿F(xiàn)輸出 電壓90%的調(diào)整率,輸出電流波動(dòng)小于單...
上傳時(shí)間: 2013-12-04
上傳用戶:kristycreasy
資源簡(jiǎn)介:A Top-Down verilog-A Design on the digital phase-lockedmloop
上傳時(shí)間: 2013-12-02
上傳用戶:silenthink
資源簡(jiǎn)介:verilog code for 3 bit sequence detector
上傳時(shí)間: 2017-06-26
上傳用戶:gdgzhym
資源簡(jiǎn)介:以89S52單片機(jī)和EP1C6Q240C8型FPGA為控制核心的多功能計(jì)數(shù)器,是由峰值檢波、A/D轉(zhuǎn)換、程控放大、比較整形、移相網(wǎng)絡(luò)部分組成,可實(shí)現(xiàn)測(cè)量正弦信號(hào)的頻率、周期和相位差的功能。多功能計(jì)數(shù)器采用等精度的測(cè)量方法,可實(shí)現(xiàn)頻率為1Hz~10MHz、幅度為0.01~5Vrms...
上傳時(shí)間: 2013-11-15
上傳用戶:gy592333
資源簡(jiǎn)介:verilog HDL: Magnitude For a vector (a,b), the magnitude representation is the following: A common approach to implementing these arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC ...
上傳時(shí)間: 2013-12-24
上傳用戶:金宜
資源簡(jiǎn)介:We address the problem of blind carrier frequency-offset (CFO) estimation in quadrature amplitude modulation, phase-shift keying, and pulse amplitude modulation communications systems.We study the performance of a standard CFO estimate, ...
上傳時(shí)間: 2014-01-22
上傳用戶:牛布牛
資源簡(jiǎn)介:Carrier-phase synchronization can be approached in a general manner by estimating the multiplicative distortion (MD) to which a baseband received signal in an RF or coherent optical transmission system is subjected. This paper presents a...
上傳時(shí)間: 2013-11-28
上傳用戶:windwolf2000
資源簡(jiǎn)介:The Window Design Method The basic idea behind the design of linear-phase FIR filters using the window method is to choose a proper ideal frequency-selective filter [which always has a noncausal, infinite duration impulse response] and t...
上傳時(shí)間: 2017-03-20
上傳用戶:PresidentHuang
資源簡(jiǎn)介:MATLAB-based program that generates plots of input power and shaft torque for variable-frequency operation of three-phase induction motors
上傳時(shí)間: 2017-04-22
上傳用戶:ma1301115706
資源簡(jiǎn)介:SPWM technique for Three phase Inverter. Analysis fundamental improvement with respect to modulation index variation is done in simulation. Analysis can be done also for switching frequency variation for shifting the dominant harmonics
上傳時(shí)間: 2017-04-23
上傳用戶:hanli8870
資源簡(jiǎn)介:This application note considers the design of frequency- selective filters, which modify the frequency content and phase of input signals according to some specification. Two classes of frequency-selective digital filters are considered...
上傳時(shí)間: 2013-12-07
上傳用戶:chfanjiang
資源簡(jiǎn)介:This application note considers the design of frequency- selective filters, which modify the frequency content and phase of input signals according to some specification. Two classes of frequency-selective digital filters are considered...
上傳時(shí)間: 2014-01-04
上傳用戶:ardager
資源簡(jiǎn)介:This circuit is a nice edge detector that gives you synchronous notification of edges on your input signal. There s no excuse for not doing this it s a tiny circuit in just five lines of verilog.
上傳時(shí)間: 2017-09-18
上傳用戶:xieguodong1234
資源簡(jiǎn)介:The 4.0 kbit/s speech codec described in this paper is based on a frequency Domain Interpolative (FDI) coding technique, which belongs to the class of prototype waveform Interpolation (PWI) coding techniques. The codec also has an integrate...
上傳時(shí)間: 2018-04-08
上傳用戶:kilohorse
資源簡(jiǎn)介:verilog-HDL實(shí)踐與應(yīng)用系統(tǒng)設(shè)計(jì)
上傳時(shí)間: 2013-08-06
上傳用戶:eeworm
資源簡(jiǎn)介:精通verilog HDL:IC設(shè)計(jì)核心技術(shù)實(shí)例詳解
上傳時(shí)間: 2013-07-24
上傳用戶:eeworm
資源簡(jiǎn)介:專輯類----可編程邏輯器件相關(guān)專輯 verilog-HDL實(shí)踐與應(yīng)用系統(tǒng)設(shè)計(jì)-210頁(yè)-18.0M.rar
上傳時(shí)間: 2013-07-23
上傳用戶:小宇NVO
資源簡(jiǎn)介:專輯類-可編程邏輯器件相關(guān)專輯-96冊(cè)-1.77G verilog-HDL實(shí)踐與應(yīng)用系統(tǒng)設(shè)計(jì)-210頁(yè)-18.0M.pdf
上傳時(shí)間: 2013-04-24
上傳用戶:vodssv
資源簡(jiǎn)介:很棒的verilog硬件描述語言學(xué)習(xí)資料。 推薦下載!!!
上傳時(shí)間: 2013-06-23
上傳用戶:1101055045
資源簡(jiǎn)介:verilog數(shù)字系統(tǒng)設(shè)計(jì)-夏宇聞教材.rar
上傳時(shí)間: 2013-08-04
上傳用戶:yanqie
資源簡(jiǎn)介:近幾年來,OFDM(Orthogonal frequency Division Multiplexing)技術(shù)引起了人們的廣泛注意,根據(jù)這項(xiàng)新技術(shù),很多相關(guān)協(xié)議被提出來。其中WiMax(Wireless MetropolitanArea Networks)代表空中接口滿足IEEE 802.16標(biāo)準(zhǔn)的寬帶無線通信系統(tǒng),IEEE標(biāo)準(zhǔn)在2004年定義了...
上傳時(shí)間: 2013-07-31
上傳用戶:1757122702
資源簡(jiǎn)介:這是華為內(nèi)部的verilog培訓(xùn)資料,與大家共享啊!!!
上傳時(shí)間: 2013-04-24
上傳用戶:xauthu
資源簡(jiǎn)介:一種流水線CPU的verilog源代碼,里面有各個(gè)模塊的源代碼,希望對(duì)大家有幫助
上傳時(shí)間: 2013-07-14
上傳用戶:xymbian
資源簡(jiǎn)介:夏宇聞-verilog經(jīng)典教程,介紹簡(jiǎn)單而實(shí)用,設(shè)計(jì)人員使用方便。
上傳時(shí)間: 2013-07-13
上傳用戶:tedo811
資源簡(jiǎn)介:verilog代碼集錦,有需要的看看,對(duì)初學(xué)者很有價(jià)值的
上傳時(shí)間: 2013-04-24
上傳用戶:afeiafei309