--------------------------------------------------------------------------------- -- $Revision: 1.3 $-- $Date: 2003/12/31 02:16:42 $----------------------------------------------------------------------------------- Local Link Stimulus-----------------------------------------------------------------------------------     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"--     SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR--     XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION--     AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION--     OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS--     IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,--     AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE--     FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY--     WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE--     IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR--     REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF--     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS--     FOR A PARTICULAR PURPOSE.--     --     (c) Copyright 2003 Xilinx, Inc.--     All rights reserved.------------------------------------------------------------------------- File Name: ll_stim.vhd-- Author: Chris Borrelli---- Description: Local Link Stimulus from data files---------------------------------------------------------------------library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;use ieee.std_logic_arith.all;library std;use std.textio.all;library work;use work.crc_functions.all;entity LL_STIM is  generic (    C_DATA_WIDTH  : integer := 32;    C_REM_WIDTH   : integer := 2  );  port (    DATA        : out std_logic_vector(C_DATA_WIDTH-1 downto 0);    LL_REM      : out std_logic_vector(C_REM_WIDTH-1 downto 0);    SOF_N       : out std_logic;    SOP_N       : out std_logic;    EOP_N       : out std_logic;    EOF_N       : out std_logic;    SRC_RDY_N   : out std_logic;    DST_RDY_N   : in  std_logic;    CLK         : in  std_logic;    RESET       : in  std_logic  );end LL_STIM;architecture guts of LL_STIM is  type stim_dat_t   is array (0 to (1024*16)-1) of std_logic_vector(C_DATA_WIDTH-1 downto 0);  type stim_rem_t   is array (0 to (1024*16)-1) of std_logic_vector(C_REM_WIDTH-1 downto 0);  type stim_bit_t   is array (0 to (1024*16)-1) of std_logic;  signal stim_data        : stim_dat_t;  signal stim_rem         : stim_rem_t;  signal stim_sof_n       : stim_bit_t;  signal stim_eof_n       : stim_bit_t;  signal stim_sop_n       : stim_bit_t;  signal stim_eop_n       : stim_bit_t;  signal stim_src_rdy_n   : stim_bit_t;  function hex2bin (c : character) return std_logic_vector is  begin    case c is      when '0'    => return "0000";      when '1'    => return "0001";      when '2'    => return "0010";      when '3'    => return "0011";      when '4'    => return "0100";      when '5'    => return "0101";      when '6'    => return "0110";      when '7'    => return "0111";      when '8'    => return "1000";      when '9'    => return "1001";      when 'a'    => return "1010";      when 'A'    => return "1010";      when 'b'    => return "1011";      when 'B'    => return "1011";      when 'c'    => return "1100";      when 'C'    => return "1100";      when 'd'    => return "1101";      when 'D'    => return "1101";      when 'e'    => return "1110";      when 'E'    => return "1110";      when 'f'    => return "1111";      when 'F'    => return "1111";      when others => assert false                     report "unknown character in hex2bin function"                     severity failure;    end case;    return "0000";  end hex2bin;  procedure Grow_line(L : inout LINE; incr : in integer)  is      variable old_L : LINE := L;      variable bfp: integer;  -- Blank fill pointer.  begin      assert incr > 0          report "Textio: Grow_line called with zero increment."          severity error;      if L = null then          bfp := 0;          L := new string(1 to incr);      else          bfp := old_L'high;          L := new string(old_L'low to old_L'high + incr);          L(old_L'low to old_L'high) := old_L.all;          Deallocate(old_L);      end if;      for i in 1 to incr loop          L(bfp + i) := ' ';      end loop;  end;  procedure GET_STIM (    stim_filename           : in string;    stim_size               : out integer;    signal CLK              : in std_logic;    signal stim_data        : out stim_dat_t;    signal stim_rem         : out stim_rem_t;    signal stim_sof_n       : out stim_bit_t;    signal stim_eof_n       : out stim_bit_t;    signal stim_sop_n       : out stim_bit_t;    signal stim_eop_n       : out stim_bit_t;    signal stim_src_rdy_n   : out stim_bit_t    ) is    file data_file : text;    variable fstat : file_open_status;    variable stim_sz    : integer := 0;    variable ln         : line;    variable comment1   : character;    variable comment2   : character;    variable data_str   : string(1 to C_DATA_WIDTH/4);    variable data       : std_logic_vector(C_DATA_WIDTH-1 downto 0);    variable sof_n      : bit;    variable eof_n      : bit;    variable sop_n      : bit;    variable eop_n      : bit;    variable src_rdy_n  : bit;    variable rem_enc    : bit_vector(rem_width_calc(C_DATA_WIDTH)-1 downto 0);    variable i : integer := 0;    variable j : integer := 0;  begin    file_open(data_file, stim_filename, read_mode);    assert fstat = open_ok           report "GET_STIM: Error opening file"           severity failure;    while not endfile(data_file) loop      readline(data_file, ln);      if (ln'length > 0) then        -- ignore lines that start with '//'        read(ln, comment1);        read(ln, comment2);        if (comment1 /= '/' or comment2 /= '/') then          grow_line(ln, 2);          ln(ln'left to ln'right) := comment1 & comment2 & ln(ln'left to ln'right-2);          read(ln, data_str);          j := 0;          for i in data_str'length downto 1 loop            data(j*4+3 downto j*4) := hex2bin(data_str(i));            j := j + 1;          end loop;          read(ln, sof_n);          read(ln, eof_n);          read(ln, sop_n);          read(ln, eop_n);          read(ln, src_rdy_n);          read(ln, rem_enc);          stim_data(stim_sz)      <= data;          stim_rem(stim_sz)       <= to_stdlogicvector(rem_enc);          stim_sof_n(stim_sz)     <= to_stdulogic(sof_n);          stim_eof_n(stim_sz)     <= to_stdulogic(eof_n);          stim_sop_n(stim_sz)     <= to_stdulogic(sop_n);          stim_eop_n(stim_sz)     <= to_stdulogic(eop_n);          stim_src_rdy_n(stim_sz) <= to_stdulogic(src_rdy_n);          stim_sz := stim_sz + 1;        end if;      end if;    end loop;    stim_size := stim_sz;  end GET_STIM;  procedure TX_FRAME (    stim_size       : in  integer;    signal CLK             : in  std_logic;    signal DST_RDY_N       : in  std_logic;    signal DATA            : out std_logic_vector;    signal SOF_N           : out std_logic;    signal EOF_N           : out std_logic;    signal SOP_N           : out std_logic;    signal EOP_N           : out std_logic;    signal SRC_RDY_N       : out std_logic;    signal LL_REM          : out std_logic_vector  ) is    variable x : integer;  begin    wait until rising_edge(CLK);    for x in 0 to stim_size-1 loop      DATA        <= stim_data(x);      SOF_N       <= stim_sof_n(x);      EOF_N       <= stim_eof_n(x);      SOP_N       <= stim_sop_n(x);      EOP_N       <= stim_eop_n(x);      SRC_RDY_N   <= stim_src_rdy_n(x);      LL_REM      <= stim_rem(x);      wait until rising_edge(CLK);      while (DST_RDY_N = '1') loop        wait until rising_edge(CLK);      end loop;    end loop;  end TX_FRAME;begin  initial : process    file command_file           : text open read_mode is "./stim/stimfile_list";    variable i                  : integer := 0;    variable ln                 : line;    variable comment1           : character;    variable comment2           : character;    variable stimfile_name      : string(1 to 1024);    variable return_stim_size   : integer := 0;  begin    DATA        <= (others => '0');    SOF_N       <= '1';    EOF_N       <= '1';    SOP_N       <= '1';    EOP_N       <= '1';    SRC_RDY_N   <= '1';    LL_REM      <= (others => '0');    wait until rising_edge(CLK);    wait until rising_edge(CLK);    wait until rising_edge(CLK);    wait until falling_edge(RESET);    wait until rising_edge(CLK);    while not endfile(command_file) loop      readline(command_file, ln);      if (ln'length > 0) then        -- ignore lines that start with '//'        read(ln, comment1);        read(ln, comment2);        if (comment1 /= '/' or comment2 /= '/') then          grow_line(ln, 2);          ln(ln'left to ln'right) := comment1 & comment2 & ln(ln'left to ln'right-2);          read(ln, stimfile_name(1 to ln'length));          GET_STIM( stimfile_name, return_stim_size,                    CLK,                    stim_data,                    stim_rem,                    stim_sof_n,                    stim_eof_n,                    stim_sop_n,                    stim_eop_n,                    stim_src_rdy_n                  );          TX_FRAME( return_stim_size, CLK, DST_RDY_N, DATA, SOF_N,                    EOF_N, SOP_N, EOP_N, SRC_RDY_N, LL_REM                  );        end if;      end if;    end loop;    wait until rising_edge(CLK);    wait until rising_edge(CLK);    wait until rising_edge(CLK);    for i in 0 to 2000 loop      wait until rising_edge(CLK);    end loop;    report "End Of Test.  This is not an error"    severity error;  end process;end guts;