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--D1_dout is free:free1|dout at LC_X21_Y5_N3
--operation mode is normal

D1_dout_lut_out = D1_count[3] & !D1L01 & (D1_dout) # !D1_count[3] & (D1L9);
D1_dout = DFFEAS(D1_dout_lut_out, GLOBAL(clk), VCC, , B1_en3, , , , );


--F1_crcout is shift32:shift|crcout at LC_X19_Y5_N8
--operation mode is normal

F1_crcout_lut_out = B1_sel1 & F1L67 # !B1_sel1 & (F1L21);
F1_crcout = DFFEAS(F1_crcout_lut_out, GLOBAL(clk), VCC, , F1L37, , , , );


--F1_flag is shift32:shift|flag at LC_X21_Y5_N5
--operation mode is normal

F1_flag_lut_out = !F1_state.e4 & (F1_crcout);
F1_flag = DFFEAS(F1_flag_lut_out, GLOBAL(clk), VCC, , B1_en1, , , , );


--E1L1 is mux3:mux|always0~162 at LC_X21_Y5_N0
--operation mode is normal

E1L1 = ept & (D1_dout) # !ept & !F1_flag & F1_crcout;


--C1_dout is flag1:flag11|dout at LC_X24_Y6_N2
--operation mode is normal

C1_dout_lut_out = C1_count[2] & (!C1_count[1] # !C1_count[0]) # !C1_count[2] & (C1_count[0] # C1_count[1]);
C1_dout = DFFEAS(C1_dout_lut_out, GLOBAL(clk), VCC, , B1_en2, , , , );


--B1_sel2 is control:control1|sel2 at LC_X21_Y7_N1
--operation mode is normal

B1_sel2_lut_out = !B1L41 & (B1L15 # !B1L24 & B1_en2);
B1_sel2 = DFFEAS(B1_sel2_lut_out, GLOBAL(clk), VCC, , , , , , );


--E1L2 is mux3:mux|always0~163 at LC_X21_Y5_N4
--operation mode is normal

E1L2 = B1_sel2 & (E1L1) # !B1_sel2 & C1_dout;


--F1L87 is shift32:shift|out~9 at LC_X21_Y5_N7
--operation mode is normal

F1L87 = F1_crcout & !F1_flag;


--B1_en2 is control:control1|en2 at LC_X20_Y7_N7
--operation mode is normal

B1_en2_lut_out = B1L41 # B1L24 & B1_en2 & !B1_en3;
B1_en2 = DFFEAS(B1_en2_lut_out, GLOBAL(clk), VCC, , , , , , );


--B1_sel1 is control:control1|sel1 at LC_X19_Y7_N5
--operation mode is normal

B1_sel1_lut_out = B1L41 # B1_sel1 & (!B1L84 # !B1L42);
B1_sel1 = DFFEAS(B1_sel1_lut_out, GLOBAL(clk), VCC, , , , , , );


--D1_count[0] is free:free1|count[0] at LC_X22_Y6_N8
--operation mode is normal

D1_count[0]_lut_out = B1_en3 & (D1_count[3] & D1_count[0] & !D1L01 # !D1_count[3] & !D1_count[0]);
D1_count[0] = DFFEAS(D1_count[0]_lut_out, GLOBAL(clk), VCC, , , , , , );


--D1_count[1] is free:free1|count[1] at LC_X22_Y6_N6
--operation mode is normal

D1_count[1]_lut_out = B1_en3 & (D1_count[1] $ (!D1_count[3] & D1_count[0]));
D1_count[1] = DFFEAS(D1_count[1]_lut_out, GLOBAL(clk), VCC, , , , , , );


--D1_count[2] is free:free1|count[2] at LC_X22_Y6_N5
--operation mode is normal

D1_count[2]_lut_out = B1_en3 & (D1L5);
D1_count[2] = DFFEAS(D1_count[2]_lut_out, GLOBAL(clk), VCC, , , , , , );


--D1L9 is free:free1|dout~214 at LC_X22_Y5_N9
--operation mode is normal

D1L9 = D1_count[0] & (D1_count[1] # D1_count[2]) # !D1_count[0] & (!D1_count[2]);


--D1_count[3] is free:free1|count[3] at LC_X22_Y6_N2
--operation mode is normal

D1_count[3]_lut_out = D1L7 & B1_en3;
D1_count[3] = DFFEAS(D1_count[3]_lut_out, GLOBAL(clk), VCC, , , , , , );


--D1L01 is free:free1|reduce_nor~15 at LC_X22_Y6_N7
--operation mode is normal

D1L01 = !D1_count[1] & (!D1_count[0] & !D1_count[2]);


--F1_count[5] is shift32:shift|count[5] at LC_X18_Y6_N6
--operation mode is normal

F1_count[5]_carry_eqn = (!F1L44 & F1L15) # (F1L44 & F1L25);
F1_count[5]_lut_out = F1_count[5]_carry_eqn $ !F1_count[5];
F1_count[5] = DFFEAS(F1_count[5]_lut_out, GLOBAL(clk), VCC, , F1L94, ~GND, , , F1L84);


--F1_count1[2] is shift32:shift|count1[2] at LC_X19_Y8_N3
--operation mode is normal

F1_count1[2]_lut_out = F1L31 # reset1 # F1_count[5];
F1_count1[2] = DFFEAS(F1_count1[2]_lut_out, GLOBAL(clk), VCC, , F1L62, , , , );


--F1_count1[0] is shift32:shift|count1[0] at LC_X19_Y8_N0
--operation mode is normal

F1_count1[0]_lut_out = reset1 # F1_count[5] # F1L61;
F1_count1[0] = DFFEAS(F1_count1[0]_lut_out, GLOBAL(clk), VCC, , F1L62, , , , );


--F1_count1[1] is shift32:shift|count1[1] at LC_X19_Y6_N4
--operation mode is normal

F1_count1[1]_lut_out = F1_count[5] # reset1 # F1L91;
F1_count1[1] = DFFEAS(F1_count1[1]_lut_out, GLOBAL(clk), VCC, , F1L62, , , , );


--F1_count1[4] is shift32:shift|count1[4] at LC_X19_Y6_N7
--operation mode is normal

F1_count1[4]_lut_out = reset1 # F1L22 # F1_count[5];
F1_count1[4] = DFFEAS(F1_count1[4]_lut_out, GLOBAL(clk), VCC, , F1L62, , , , );


--F1_count1[3] is shift32:shift|count1[3] at LC_X19_Y8_N4
--operation mode is normal

F1_count1[3]_lut_out = F1_count[5] # F1L32 # reset1;
F1_count1[3] = DFFEAS(F1_count1[3]_lut_out, GLOBAL(clk), VCC, , F1L62, , , , );


--F1L1 is shift32:shift|Mux~125 at LC_X19_Y8_N2
--operation mode is normal

F1L1 = F1_count1[4] & (F1_count1[1] # !F1_count1[3] & !F1_count1[0]) # !F1_count1[4] & (F1_count1[0] $ (F1_count1[1] & !F1_count1[3]));


--F1L57 is shift32:shift|dout~75 at LC_X19_Y8_N1
--operation mode is normal

F1_dout_qfbk = F1_dout;
F1L57 = F1_count[5] & (F1_dout_qfbk) # !F1_count[5] & !F1L1 & (!F1_count1[2]);

--F1_dout is shift32:shift|dout at LC_X19_Y8_N1
--operation mode is normal

F1_dout = DFFEAS(F1L57, GLOBAL(clk), VCC, , F1L37, F1L67, , , VCC);


--F1L2 is shift32:shift|Mux~126 at LC_X19_Y5_N5
--operation mode is normal

F1L2 = F1_count1[4] & !F1_count1[1] & !F1_count1[0] # !F1_count1[4] & (F1_count1[0] & F1_count1[3]);


--F1L67 is shift32:shift|dout~76 at LC_X19_Y5_N2
--operation mode is normal

F1L67 = F1L57 # !F1L2 & !F1_count[5] & F1_count1[2];


--F1_crc_reg[10] is shift32:shift|crc_reg[10] at LC_X20_Y5_N5
--operation mode is normal

F1_crc_reg[10]_lut_out = F1_crc_reg[9] # reset1;
F1_crc_reg[10] = DFFEAS(F1_crc_reg[10]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1_count[1] is shift32:shift|count[1] at LC_X18_Y6_N2
--operation mode is arithmetic

F1_count[1]_lut_out = F1_count[1] $ (!F1L53);
F1_count[1] = DFFEAS(F1_count[1]_lut_out, GLOBAL(clk), VCC, , F1L94, VCC, , , F1L84);

--F1L83 is shift32:shift|count[1]~247 at LC_X18_Y6_N2
--operation mode is arithmetic

F1L83_cout_0 = !F1_count[1] & (!F1L53);
F1L83 = CARRY(F1L83_cout_0);

--F1L93 is shift32:shift|count[1]~247COUT1_271 at LC_X18_Y6_N2
--operation mode is arithmetic

F1L93_cout_1 = !F1_count[1] & (!F1L63);
F1L93 = CARRY(F1L93_cout_1);


--F1_crc_reg[9] is shift32:shift|crc_reg[9] at LC_X20_Y5_N8
--operation mode is normal

F1_crc_reg[9]_lut_out = reset1 # F1_crc_reg[8];
F1_crc_reg[9] = DFFEAS(F1_crc_reg[9]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1_count[0] is shift32:shift|count[0] at LC_X18_Y6_N1
--operation mode is arithmetic

F1_count[0]_lut_out = !F1_count[0];
F1_count[0] = DFFEAS(F1_count[0]_lut_out, GLOBAL(clk), VCC, , F1L94, VCC, , , F1L84);

--F1L53 is shift32:shift|count[0]~251 at LC_X18_Y6_N1
--operation mode is arithmetic

F1L53_cout_0 = F1_count[0];
F1L53 = CARRY(F1L53_cout_0);

--F1L63 is shift32:shift|count[0]~251COUT1_270 at LC_X18_Y6_N1
--operation mode is arithmetic

F1L63_cout_1 = F1_count[0];
F1L63 = CARRY(F1L63_cout_1);


--F1_crc_reg[8] is shift32:shift|crc_reg[8] at LC_X20_Y5_N0
--operation mode is normal

F1_crc_reg[8]_lut_out = reset1 # F1_crc_reg[7];
F1_crc_reg[8] = DFFEAS(F1_crc_reg[8]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1L3 is shift32:shift|Mux~127 at LC_X20_Y5_N7
--operation mode is normal

F1L3 = F1_count[0] & (F1_crc_reg[9] # F1_count[1]) # !F1_count[0] & (!F1_count[1] & F1_crc_reg[8]);


--F1_crc_reg[11] is shift32:shift|crc_reg[11] at LC_X20_Y5_N9
--operation mode is normal

F1_crc_reg[11]_lut_out = reset1 # F1_crc_reg[10];
F1_crc_reg[11] = DFFEAS(F1_crc_reg[11]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1L4 is shift32:shift|Mux~128 at LC_X20_Y5_N2
--operation mode is normal

F1L4 = F1L3 & (F1_crc_reg[11] # !F1_count[1]) # !F1L3 & F1_count[1] & (F1_crc_reg[10]);


--F1_count[3] is shift32:shift|count[3] at LC_X18_Y6_N4
--operation mode is arithmetic

F1_count[3]_lut_out = F1_count[3] $ !F1L14;
F1_count[3] = DFFEAS(F1_count[3]_lut_out, GLOBAL(clk), VCC, , F1L94, VCC, , , F1L84);

--F1L44 is shift32:shift|count[3]~255 at LC_X18_Y6_N4
--operation mode is arithmetic

F1L44 = F1L54;


--F1_crc_reg[5] is shift32:shift|crc_reg[5] at LC_X21_Y6_N3
--operation mode is normal

F1_crc_reg[5]_lut_out = F1L67 $ F1_crc_reg[15] $ (F1_crc_reg[4]);
F1_crc_reg[5] = DFFEAS(F1_crc_reg[5]_lut_out, GLOBAL(clk), VCC, , F1L17, VCC, , , reset1);


--F1_crc_reg[6] is shift32:shift|crc_reg[6] at LC_X21_Y6_N9
--operation mode is normal

F1_crc_reg[6]_lut_out = reset1 # F1_crc_reg[5];
F1_crc_reg[6] = DFFEAS(F1_crc_reg[6]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1_crc_reg[4] is shift32:shift|crc_reg[4] at LC_X19_Y6_N1
--operation mode is normal

F1_crc_reg[4]_lut_out = reset1 # F1_crc_reg[3];
F1_crc_reg[4] = DFFEAS(F1_crc_reg[4]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1L5 is shift32:shift|Mux~129 at LC_X20_Y5_N1
--operation mode is normal

F1L5 = F1_count[0] & (F1_count[1]) # !F1_count[0] & (F1_count[1] & (F1_crc_reg[6]) # !F1_count[1] & F1_crc_reg[4]);


--F1_crc_reg[7] is shift32:shift|crc_reg[7] at LC_X20_Y5_N3
--operation mode is normal

F1_crc_reg[7]_lut_out = reset1 # F1_crc_reg[6];
F1_crc_reg[7] = DFFEAS(F1_crc_reg[7]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1L6 is shift32:shift|Mux~130 at LC_X20_Y5_N6
--operation mode is normal

F1L6 = F1_count[0] & (F1L5 & F1_crc_reg[7] # !F1L5 & (F1_crc_reg[5])) # !F1_count[0] & (F1L5);


--F1_count[2] is shift32:shift|count[2] at LC_X18_Y6_N3
--operation mode is arithmetic

F1_count[2]_lut_out = F1_count[2] $ F1L83;
F1_count[2] = DFFEAS(F1_count[2]_lut_out, GLOBAL(clk), VCC, , F1L94, VCC, , , F1L84);

--F1L14 is shift32:shift|count[2]~259 at LC_X18_Y6_N3
--operation mode is arithmetic

F1L14_cout_0 = F1_count[2] # !F1L83;
F1L14 = CARRY(F1L14_cout_0);

--F1L24 is shift32:shift|count[2]~259COUT1 at LC_X18_Y6_N3
--operation mode is arithmetic

F1L24_cout_1 = F1_count[2] # !F1L93;
F1L24 = CARRY(F1L24_cout_1);


--F1_crc_reg[2] is shift32:shift|crc_reg[2] at LC_X19_Y6_N2
--operation mode is normal

F1_crc_reg[2]_lut_out = reset1 # F1_crc_reg[1];
F1_crc_reg[2] = DFFEAS(F1_crc_reg[2]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1_crc_reg[1] is shift32:shift|crc_reg[1] at LC_X19_Y6_N5
--operation mode is normal

F1_crc_reg[1]_lut_out = F1_crc_reg[0] # reset1;
F1_crc_reg[1] = DFFEAS(F1_crc_reg[1]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1_crc_reg[0] is shift32:shift|crc_reg[0] at LC_X21_Y6_N1
--operation mode is normal

F1_crc_reg[0]_lut_out = F1_crc_reg[15] $ (F1L67);
F1_crc_reg[0] = DFFEAS(F1_crc_reg[0]_lut_out, GLOBAL(clk), VCC, , F1L17, VCC, , , reset1);


--F1L7 is shift32:shift|Mux~131 at LC_X19_Y6_N6
--operation mode is normal

F1L7 = F1_count[0] & (F1_count[1] # F1_crc_reg[1]) # !F1_count[0] & !F1_count[1] & F1_crc_reg[0];


--F1_crc_reg[3] is shift32:shift|crc_reg[3] at LC_X19_Y6_N3
--operation mode is normal

F1_crc_reg[3]_lut_out = F1_crc_reg[2] # reset1;
F1_crc_reg[3] = DFFEAS(F1_crc_reg[3]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1L8 is shift32:shift|Mux~132 at LC_X19_Y6_N0
--operation mode is normal

F1L8 = F1L7 & (F1_crc_reg[3] # !F1_count[1]) # !F1L7 & F1_count[1] & F1_crc_reg[2];


--F1L9 is shift32:shift|Mux~133 at LC_X19_Y5_N0
--operation mode is normal

F1L9 = F1_count[3] & F1_count[2] # !F1_count[3] & (F1_count[2] & (F1L6) # !F1_count[2] & F1L8);


--F1_crc_reg[13] is shift32:shift|crc_reg[13] at LC_X19_Y5_N9
--operation mode is normal

F1_crc_reg[13]_lut_out = reset1 # F1_crc_reg[12];
F1_crc_reg[13] = DFFEAS(F1_crc_reg[13]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1_crc_reg[14] is shift32:shift|crc_reg[14] at LC_X19_Y5_N1
--operation mode is normal

F1_crc_reg[14]_lut_out = F1_crc_reg[13] # reset1;
F1_crc_reg[14] = DFFEAS(F1_crc_reg[14]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1_crc_reg[12] is shift32:shift|crc_reg[12] at LC_X20_Y5_N4
--operation mode is normal

F1_crc_reg[12]_lut_out = F1_crc_reg[11] $ F1L67 $ (F1_crc_reg[15]);
F1_crc_reg[12] = DFFEAS(F1_crc_reg[12]_lut_out, GLOBAL(clk), VCC, , F1L17, VCC, , , reset1);


--F1L01 is shift32:shift|Mux~134 at LC_X19_Y5_N4
--operation mode is normal

F1L01 = F1_count[1] & (F1_crc_reg[14] # F1_count[0]) # !F1_count[1] & (F1_crc_reg[12] & !F1_count[0]);


--F1_crc_reg[15] is shift32:shift|crc_reg[15] at LC_X19_Y5_N3
--operation mode is normal

F1_crc_reg[15]_lut_out = reset1 # F1_crc_reg[14];
F1_crc_reg[15] = DFFEAS(F1_crc_reg[15]_lut_out, GLOBAL(clk), VCC, , F1L17, , , , );


--F1L11 is shift32:shift|Mux~135 at LC_X19_Y5_N6
--operation mode is normal

F1L11 = F1_count[0] & (F1L01 & (F1_crc_reg[15]) # !F1L01 & F1_crc_reg[13]) # !F1_count[0] & (F1L01);


--F1L21 is shift32:shift|Mux~136 at LC_X19_Y5_N7
--operation mode is normal

F1L21 = F1_count[3] & (F1L9 & (F1L11) # !F1L9 & F1L4) # !F1_count[3] & F1L9;


--F1L37 is shift32:shift|crcout~2 at LC_X20_Y6_N7
--operation mode is normal

F1L37 = B1_en1 & !F1_flag & !reset1;


--F1_state.e4 is shift32:shift|state.e4 at LC_X21_Y5_N9
--operation mode is normal

F1_state.e4_lut_out = !F1_crcout # !F1_state.e3;
F1_state.e4 = DFFEAS(F1_state.e4_lut_out, GLOBAL(clk), VCC, , B1_en1, , , , );


--C1_count[2] is flag1:flag11|count[2] at LC_X24_Y6_N5
--operation mode is normal

C1_count[2]_lut_out = C1_count[2] $ (C1_count[0] & C1_count[1]);
C1_count[2] = DFFEAS(C1_count[2]_lut_out, GLOBAL(clk), VCC, , B1_en2, , , , );


--C1_count[1] is flag1:flag11|count[1] at LC_X24_Y6_N6
--operation mode is normal

C1_count[1]_lut_out = C1_count[0] $ C1_count[1];
C1_count[1] = DFFEAS(C1_count[1]_lut_out, GLOBAL(clk), VCC, , B1_en2, , , , );


--C1_count[0] is flag1:flag11|count[0] at LC_X24_Y6_N4
--operation mode is normal

C1_count[0]_lut_out = !C1_count[0];
C1_count[0] = DFFEAS(C1_count[0]_lut_out, GLOBAL(clk), VCC, , B1_en2, , , , );


--B1L15 is control:control1|sel2~96 at LC_X22_Y7_N2
--operation mode is normal

B1L15 = B1_sel2 # B1_en3;


--B1_count2[2] is control:control1|count2[2] at LC_X21_Y7_N7
--operation mode is normal

B1_count2[2]_lut_out = !reset1 & !B1_reset2 & (B1_count2[2] $ B1L4);
B1_count2[2] = DFFEAS(B1_count2[2]_lut_out, GLOBAL(clk), VCC, , B1L13, , , , );


--B1_count2[1] is control:control1|count2[1] at LC_X21_Y7_N5
--operation mode is normal

B1_count2[1]_lut_out = !B1L41 & (B1_count2[1] $ (B1_count2[0] & !B1_count2[3]));
B1_count2[1] = DFFEAS(B1_count2[1]_lut_out, GLOBAL(clk), VCC, , B1L13, , , , );


--B1_count2[0] is control:control1|count2[0] at LC_X21_Y7_N6
--operation mode is normal

B1_count2[0]_lut_out = !B1_reset2 & !reset1 & (B1_count2[0] $ !B1_count2[3]);
B1_count2[0] = DFFEAS(B1_count2[0]_lut_out, GLOBAL(clk), VCC, , B1L13, , , , );


--B1_count2[3] is control:control1|count2[3] at LC_X21_Y7_N4
--operation mode is normal

B1_count2[3]_lut_out = !B1L41 & (B1_count2[3] $ (B1_count2[2] & B1L4));
B1_count2[3] = DFFEAS(B1_count2[3]_lut_out, GLOBAL(clk), VCC, , B1L13, , , , );


--B1L24 is control:control1|reduce_nor~31 at LC_X21_Y7_N0
--operation mode is normal

B1L24 = B1_count2[0] # B1_count2[1] # B1_count2[2] # !B1_count2[3];


--B1_reset2 is control:control1|reset2 at LC_X19_Y7_N3
--operation mode is normal

B1_reset2_lut_out = !B1L13 & (ept & B1L64 # !ept & (B1L44));
B1_reset2 = DFFEAS(B1_reset2_lut_out, GLOBAL(clk), VCC, , , , , , );


--B1L41 is control:control1|always1~0 at LC_X19_Y7_N6