library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity txmit is
    generic(framlent:integer:=8);
    Port (bclkt,resett,xmit_cmd_p:in std_logic;                  --定義輸入輸出信號
	     txdbuf:in std_logic_vector(7 downto 0):="10011011";
		 txd:out std_logic;
		 txd_done:out std_logic);
end txmit;

architecture Behavioral of txmit is
type states is (x_idle,x_start,x_wait,x_shift,x_stop);                --定義個子狀態(tài)
signal state:states:=x_idle;
signal tcnt:integer:=0;
begin
process(bclkt,resett,xmit_cmd_p,txdbuf)                         --主控時序、組合進(jìn)程
variable xcnt16:std_logic_vector(4 downto 0):="00000";            --定義中間變量
variable xbitcnt:integer:=0;
variable txds:std_logic;
begin  
  if resett='0' then state<=x_idle; txd_done<='0'; txds:='1';           --復(fù)位
  elsif rising_edge(bclkt) then
     case state is
	   when x_idle=>                                --狀態(tài)1，等待數(shù)據(jù)幀發(fā)送命令
            if xmit_cmd_p='0' then state<=x_start;	txd_done<='0';	
			else state<=x_idle;               
			end if; 
       when x_start=>                                --狀態(tài)2，發(fā)送信號至起始位
            if xcnt16>="01111" then state<=x_wait; xcnt16:="00000";
            else xcnt16:=xcnt16+1; txds:='0'; state<=x_start;
            end if;                          
       when x_wait=>                                  --狀態(tài)3，等待狀態(tài)
            if xcnt16>="01110" then
		       if xbitcnt=framlent then state<=x_stop; xbitcnt:=0;
			   else state<=x_shift;
			   end if;
			   xcnt16:="00000";
		     else xcnt16:=xcnt16+1; state<=x_wait;
			 end if;                    
       when x_shift=>txds:=txdbuf(xbitcnt); xbitcnt:=xbitcnt+1; state<=x_wait;				                                        --狀態(tài)4，將待發(fā)數(shù)據(jù)進(jìn)行并串轉(zhuǎn)換
when x_stop=>                         --狀態(tài)5，停止位發(fā)送狀態(tài)
if xcnt16>="01111" then
			   if xmit_cmd_p='1' then state<=x_idle; xcnt16:="00000";
			   else xcnt16:=xcnt16; state<=x_stop;
			   end if; txd_done<='1';
			else xcnt16:=xcnt16+1; txds:='1'; state<=x_stop;
		    end if;                      
	   when others=>state<=x_idle;
     end case;		
  end if;
  txd<=txds;
end process;
end Behavioral;