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?? example_4bit_load.chp

?? VHDL examples for counter design, use QuickLogic eclips
?? CHP
?? 第 1 頁 / 共 4 頁
字號:
    gate I1.I3.I2 term F4 end
    gate I1.I3.I2 term F6 end
    gate I1.I3.I2 term MP end
    gate I1.I3.I2 term NP end
    gate I1.I3.I2 term OP end
    gate I1.I3.I2 term QC end
    gate I1.I3.I2 term QR end
    gate I1.I3.I2 term QS end
    gate I1.I4.I2 term CLKSEL end
    gate I1.I4.I2 term A2 end
    gate I1.I4.I2 term A4 end
    gate I1.I4.I2 term A6 end
    gate I1.I4.I2 term B2 end
    gate I1.I4.I2 term C2 end
    gate I1.I4.I2 term D2 end
    gate I1.I4.I2 term E2 end
    gate I1.I4.I2 term F2 end
    gate I1.I4.I2 term F4 end
    gate I1.I4.I2 term F6 end
    gate I1.I4.I2 term MP end
    gate I1.I4.I2 term NP end
    gate I1.I4.I2 term OP end
    gate I1.I4.I2 term QC end
    gate I1.I4.I2 term QR end
    gate I1.I4.I2 term QS end
    gate I2.I3.I2 term CLKSEL end
    gate I2.I3.I2 term A2 end
    gate I2.I3.I2 term A4 end
    gate I2.I3.I2 term A6 end
    gate I2.I3.I2 term B2 end
    gate I2.I3.I2 term C2 end
    gate I2.I3.I2 term D2 end
    gate I2.I3.I2 term E2 end
    gate I2.I3.I2 term F2 end
    gate I2.I3.I2 term F4 end
    gate I2.I3.I2 term F6 end
    gate I2.I3.I2 term MP end
    gate I2.I3.I2 term NP end
    gate I2.I3.I2 term OP end
    gate I2.I3.I2 term QC end
    gate I2.I3.I2 term QR end
    gate I2.I3.I2 term QS end
    gate I2.I4.I2 term CLKSEL end
    gate I2.I4.I2 term A2 end
    gate I2.I4.I2 term A4 end
    gate I2.I4.I2 term A6 end
    gate I2.I4.I2 term B2 end
    gate I2.I4.I2 term C2 end
    gate I2.I4.I2 term D2 end
    gate I2.I4.I2 term E2 end
    gate I2.I4.I2 term F2 end
    gate I2.I4.I2 term F4 end
    gate I2.I4.I2 term F6 end
    gate I2.I4.I2 term MP end
    gate I2.I4.I2 term NP end
    gate I2.I4.I2 term OP end
    gate I2.I4.I2 term QC end
    gate I2.I4.I2 term QR end
    gate I2.I4.I2 term QS end
    gate I3.I2 term CLKSEL end
    gate I3.I2 term A2 end
    gate I3.I2 term A4 end
    gate I3.I2 term A6 end
    gate I3.I2 term B2 end
    gate I3.I2 term C2 end
    gate I3.I2 term D2 end
    gate I3.I2 term E2 end
    gate I3.I2 term F2 end
    gate I3.I2 term F4 end
    gate I3.I2 term F6 end
    gate I3.I2 term MP end
    gate I3.I2 term NP end
    gate I3.I2 term OP end
    gate I3.I2 term QC end
    gate I3.I2 term QR end
    gate I3.I2 term QS end
    gate I12.I3 term CLKSEL end
    gate I12.I3 term A4 end
    gate I12.I3 term A6 end
    gate I12.I3 term B2 end
    gate I12.I3 term C1 end
    gate I12.I3 term C2 end
    gate I12.I3 term D2 end
    gate I12.I3 term F2 end
    gate I12.I3 term F4 end
    gate I12.I3 term F6 end
    gate I12.I3 term MP end
    gate I12.I3 term MS end
    gate I12.I3 term NS end
    gate I12.I3 term OS end
    gate I12.I3 term QC end
    gate I12.I3 term QS end
    gate I12.I16 term CLKSEL end
    gate I12.I16 term A2 end
    gate I12.I16 term A4 end
    gate I12.I16 term A6 end
    gate I12.I16 term B2 end
    gate I12.I16 term C1 end
    gate I12.I16 term C2 end
    gate I12.I16 term D2 end
    gate I12.I16 term F2 end
    gate I12.I16 term F4 end
    gate I12.I16 term F6 end
    gate I12.I16 term MP end
    gate I12.I16 term MS end
    gate I12.I16 term NS end
    gate I12.I16 term OP end
    gate I12.I16 term QC end
    gate I12.I16 term QS end
    gate I12.I17 term CLKSEL end
    gate I12.I17 term A2 end
    gate I12.I17 term A4 end
    gate I12.I17 term A6 end
    gate I12.I17 term B2 end
    gate I12.I17 term C1 end
    gate I12.I17 term C2 end
    gate I12.I17 term D2 end
    gate I12.I17 term F2 end
    gate I12.I17 term F4 end
    gate I12.I17 term F6 end
    gate I12.I17 term MP end
    gate I12.I17 term MS end
    gate I12.I17 term NS end
    gate I12.I17 term OP end
    gate I12.I17 term QC end
    gate I12.I17 term QS end
    gate I12.I18 term CLKSEL end
    gate I12.I18 term A2 end
    gate I12.I18 term A4 end
    gate I12.I18 term A6 end
    gate I12.I18 term B2 end
    gate I12.I18 term C1 end
    gate I12.I18 term C2 end
    gate I12.I18 term D2 end
    gate I12.I18 term F2 end
    gate I12.I18 term F4 end
    gate I12.I18 term F6 end
    gate I12.I18 term MP end
    gate I12.I18 term MS end
    gate I12.I18 term NS end
    gate I12.I18 term OP end
    gate I12.I18 term QC end
    gate I12.I18 term QS end
  end
  net VCC
    gate I1.I3.I2 term A1 end
    gate I1.I3.I2 term A3 end
    gate I1.I3.I2 term A5 end
    gate I1.I3.I2 term B1 end
    gate I1.I3.I2 term C1 end
    gate I1.I3.I2 term D1 end
    gate I1.I3.I2 term F1 end
    gate I1.I3.I2 term F3 end
    gate I1.I3.I2 term F5 end
    gate I1.I3.I2 term MS end
    gate I1.I3.I2 term NS end
    gate I1.I3.I2 term OS end
    gate I1.I3.I2 term PP end
    gate I1.I4.I2 term A1 end
    gate I1.I4.I2 term A3 end
    gate I1.I4.I2 term A5 end
    gate I1.I4.I2 term B1 end
    gate I1.I4.I2 term C1 end
    gate I1.I4.I2 term D1 end
    gate I1.I4.I2 term F1 end
    gate I1.I4.I2 term F3 end
    gate I1.I4.I2 term F5 end
    gate I1.I4.I2 term MS end
    gate I1.I4.I2 term NS end
    gate I1.I4.I2 term OS end
    gate I1.I4.I2 term PP end
    gate I2.I3.I2 term A1 end
    gate I2.I3.I2 term A3 end
    gate I2.I3.I2 term A5 end
    gate I2.I3.I2 term B1 end
    gate I2.I3.I2 term C1 end
    gate I2.I3.I2 term D1 end
    gate I2.I3.I2 term F1 end
    gate I2.I3.I2 term F3 end
    gate I2.I3.I2 term F5 end
    gate I2.I3.I2 term MS end
    gate I2.I3.I2 term NS end
    gate I2.I3.I2 term OS end
    gate I2.I3.I2 term PP end
    gate I2.I4.I2 term A1 end
    gate I2.I4.I2 term A3 end
    gate I2.I4.I2 term A5 end
    gate I2.I4.I2 term B1 end
    gate I2.I4.I2 term C1 end
    gate I2.I4.I2 term D1 end
    gate I2.I4.I2 term F1 end
    gate I2.I4.I2 term F3 end
    gate I2.I4.I2 term F5 end
    gate I2.I4.I2 term MS end
    gate I2.I4.I2 term NS end
    gate I2.I4.I2 term OS end
    gate I2.I4.I2 term PP end
    gate I3.I2 term A1 end
    gate I3.I2 term A3 end
    gate I3.I2 term A5 end
    gate I3.I2 term B1 end
    gate I3.I2 term C1 end
    gate I3.I2 term D1 end
    gate I3.I2 term F1 end
    gate I3.I2 term F3 end
    gate I3.I2 term F5 end
    gate I3.I2 term MS end
    gate I3.I2 term NS end
    gate I3.I2 term OS end
    gate I3.I2 term PP end
    gate I4.I1 term SLEWRATE end
    gate I4.I1 term WPD end
    gate I4.I1 term ISEL end
    gate I4.I2 term SLEWRATE end
    gate I4.I2 term WPD end
    gate I4.I2 term ISEL end
    gate I4.I3 term SLEWRATE end
    gate I4.I3 term WPD end
    gate I4.I3 term ISEL end
    gate I4.I4 term SLEWRATE end
    gate I4.I4 term WPD end
    gate I4.I4 term ISEL end
    gate I5.I1 term SLEWRATE end
    gate I5.I1 term WPD end
    gate I5.I1 term ISEL end
    gate I5.I2 term SLEWRATE end
    gate I5.I2 term WPD end
    gate I5.I2 term ISEL end
    gate I5.I3 term SLEWRATE end
    gate I5.I3 term WPD end
    gate I5.I3 term ISEL end
    gate I5.I4 term SLEWRATE end
    gate I5.I4 term WPD end
    gate I5.I4 term ISEL end
    gate I6 term SLEWRATE end
    gate I6 term WPD end
    gate I6 term ISEL end
    gate I7 term SLEWRATE end
    gate I7 term WPD end
    gate I7 term ISEL end
    gate I12.I3 term A1 end
    gate I12.I3 term A3 end
    gate I12.I3 term A5 end
    gate I12.I3 term E1 end
    gate I12.I3 term F1 end
    gate I12.I3 term F3 end
    gate I12.I3 term F5 end
    gate I12.I3 term OP end
    gate I12.I3 term PP end
    gate I12.I16 term A1 end
    gate I12.I16 term A3 end
    gate I12.I16 term A5 end
    gate I12.I16 term E1 end
    gate I12.I16 term PP end
    gate I12.I17 term A1 end
    gate I12.I17 term A3 end
    gate I12.I17 term A5 end
    gate I12.I17 term E1 end
    gate I12.I17 term F5 end
    gate I12.I17 term PP end
    gate I12.I18 term A3 end
    gate I12.I18 term A5 end
    gate I12.I18 term E1 end
    gate I12.I18 term F3 end
    gate I12.I18 term F5 end
    gate I12.I18 term PP end
  end
end
place up
  cell C1
    gate I1.I3.I2
      term DCLK port DCLK end
      term CLKSEL port CLKSEL end
      term E1 port E1 end
      term MP port MP end
      term NP port NP end
      term OP port OP end
      term PS port PS end
      term Q2Z port Q2Z end
      term QZ port QZ end
    end
    block fragments ONQS;
      port Q2Z net data_in_reg[3]
      port QZ net data_in_reg[2]
      port DCLK net clk
      port CLKSEL net GND
      port E1 net data_in[2]
      port MP net GND
      port NP net GND
      port OP net GND
      port PS net data_in[3]
    end
  end
  cell A3
    gate I2.I4.I2
      term DCLK port DCLK end
      term CLKSEL port CLKSEL end
      term E1 port E1 end
      term MP port MP end
      term NP port NP end
      term OP port OP end
      term PS port PS end
      term Q2Z port Q2Z end
      term QZ port QZ end
    end
    block fragments ONQS;
      port Q2Z net count_reg[1]
      port QZ net count_reg[0]
      port DCLK net clk
      port CLKSEL net GND
      port E1 net count[0]
      port MP net GND
      port NP net GND
      port OP net GND
      port PS net count[1]
    end
  end
  cell B3
    gate I12.I3
      term DCLK port DCLK end
      term CLKSEL port CLKSEL end
      term A2 port A2 end
      term B1 port B1 end
      term C1 port C1 end
      term D1 port D1 end
      term E2 port E2 end
      term MP port MP end
      term MS port MS end
      term NP port NP end
      term NS port NS end
      term OS port OS end
      term PS port PS end
      term QR port QR end
      term AZ port AZ end
      term OZ port OZ end
      term Q2Z port Q2Z end
      term QZ port QZ end
    end
    block fragments AFONQS;
      port AZ net .I12-load_N
      port OZ net .I12-Qd_a
      port Q2Z net count[0]
      port QZ net .I12-Qd_r
      port DCLK net clk
      port CLKSEL net GND
      port A2 net load_reg
      port B1 net data_in_reg[0]
      port C1 net GND
      port D1 net count[0]
      port E2 net count[0]
      port MP net GND
      port MS net GND
      port NP net .I12-enable_buf
      port NS net GND
      port OS net GND
      port PS net .I12-Qd_a
      port QR net clear
    end
  end
  cell C3
    gate I12.I16
      term DCLK port DCLK end
      term CLKSEL port CLKSEL end
      term B1 port B1 end
      term C1 port C1 end
      term D1 port D1 end
      term E2 port E2 end
      term F1 port F1 end
      term F3 port F3 end
      term F5 port F5 end
      term MP port MP end
      term MS port MS end
      term NP port NP end
      term NS port NS end
      term OP port OP end
      term OS port OS end
      term PS port PS end
      term QR port QR end
      term OZ port OZ end
      term Q2Z port Q2Z end
      term QZ port QZ end
    end
    block fragments FONQS;
      port OZ net .I12-Qa_a
      port Q2Z net count[3]
      port QZ net .I12-Qa_r
      port DCLK net clk
      port CLKSEL net GND
      port B1 net data_in_reg[3]
      port C1 net GND
      port D1 net .I12-Qa_r
      port E2 net .I12-Qa_r
      port F1 net .I12-Qb_r
      port F3 net .I12-Qc_r
      port F5 net .I12-Qd_r
      port MP net GND
      port MS net GND
      port NP net .I12-enable_buf
      port NS net GND
      port OP net GND
      port OS net .I12-load_N
      port PS net .I12-Qa_a
      port QR net clear
    end
  end
  cell A4
    gate I1.I4.I2
      term DCLK port DCLK end
      term CLKSEL port CLKSEL end
      term E1 port E1 end
      term MP port MP end
      term NP port NP end
      term OP port OP end
      term PS port PS end
      term Q2Z port Q2Z end
      term QZ port QZ end
    end
    block fragments ONQS;
      port Q2Z net data_in_reg[1]
      port QZ net data_in_reg[0]
      port DCLK net clk
      port CLKSEL net GND
      port E1 net data_in[0]
      port MP net GND
      port NP net GND
      port OP net GND
      port PS net data_in[1]
    end
  end
  cell B4
    gate I12.I18
      term DCLK port DCLK end
      term CLKSEL port CLKSEL end
      term A1 port A1 end
      term B1 port B1 end
      term C1 port C1 end
      term D1 port D1 end
      term E2 port E2 end
      term F1 port F1 end
      term MP port MP end
      term MS port MS end
      term NP port NP end
      term NS port NS end

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亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
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