?? top_pnadd32.vhd
字號:
-- to test all functions in pack_fun.vhd library IEEE;use IEEE.std_logic_1164.all;use work.pack_CC_fun.all;entity GF_mult_4 is port( C:in STD_LOGIC_VECTOR(31 downto 0):="10111101101110000101000111101100"; B:in STD_LOGIC_VECTOR(31 downto 0):="00111111101000000000000000000000"; A:out STD_LOGIC_VECTOR(31 downto 0); reset:in STD_LOGIC:='0' );end GF_mult_4; architecture a of GF_mult_4 isbegin A <= "00000000000000000000000000000000" when reset = '0' else fadd(C,B);end a;
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