The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD instructions. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals
上傳時間: 2013-10-28
上傳用戶:15501536189
MIFARE Plus在當前主流非接觸式智能卡應用的基礎上提供更高的安全性,并且可輕易升級現有卡片的安全級別。在升級到新的安全級別之前,MIFARE Plus是唯一兼容MIFARE4K(MF1ICS70),MIFARE 1K(MF1ICS50)和MIFARE Mini(MF1ICS20)的主流智能卡。安全性升級后,MIFARE Plus使用AES(高級加密標準)進行認證,數據完整性和數據加密操作。MIFARE Plus的空中接口和加密方式是基于安全級別最高的全球開放式標準,。
上傳時間: 2013-12-22
上傳用戶:banyou
On the LPC13xx, programming, erasure and re-programming of the on-chip flash can be performed using In-System Programming (ISP) via the UART serial port, and also, can be performed using In-Application Programming (IAP) calls directed by the end-user code. For In-System Programming (ISP) via the UART serial port, the ISP command handler (resides in the bootloader) allows erasure of one or more sector (s) of the on-chip flash memory.
上傳時間: 2013-12-13
上傳用戶:lmq0059
LPC1100系列Cortex-M0微處理器A/D轉換器的基本時鐘由APB時鐘提供。A/D轉換器包含一個可編程的分頻器,它可以將APB時鐘調整為逐次逼近轉換所需的時鐘(最大可達4.5MHz,并且完全滿足精度要求的轉換需要11個這樣的時鐘)。
上傳時間: 2013-10-11
上傳用戶:二驅蚊器
上傳時間: 2013-11-10
上傳用戶:小眼睛LSL
This errata sheet describes both the known functional problems and anydeviations from the electrical specifications known at the release date ofthis document.Each deviation is assigned a number and its history is tracked in a table atthe end of the document.
上傳時間: 2014-12-31
上傳用戶:thuyenvinh
PE管道熱熔對接焊的工藝參數隨管道尺度和環境條件的不同而不同,同時還受人為因素的影響,對焊接機自動化程度要求很高。介紹了基于ARM嵌入式熱熔焊接機智能控制器的硬件和軟件的設計方案。此方案符合焊接各個階段工藝參數指標,并具有操作糾錯及錯誤信息管理功能,最大程度地消除了人為因素的影響,提高焊接質量,并具備焊接數據的可追溯性,便于管理人員對焊接工程的管理。
上傳時間: 2014-12-31
上傳用戶:515414293
上傳時間: 2013-10-19
上傳用戶:黃婷婷思密達
上傳時間: 2013-11-15
上傳用戶:youmo81
PCI Express是由Intel,Dell,Compaq,IBM,Microsoft等PCI SIG聯合成立的Arapahoe Work Group共同草擬并推舉成取代PCI總線標準的下一代標準。PCI Express利用串行的連接特點能輕松將數據傳輸速度提到一個很高的頻率,達到遠遠超出PCI總線的傳輸速率。一個PCI Express連接可以被配置成x1,x2,x4,x8,x12,x16和x32的數據帶寬。x1的通道能實現單向312.5 MB/s(2.5 Gb/s)的傳輸速率。Xilinx公司的Virtex5系列FPGA芯片內嵌PCI-ExpressEndpoint Block硬核,為實現單片可配置PCI-Express總線解決方案提供了可能。 本文在研究PCI-Express接口協議和PCI-Express Endpoint Block硬核的基礎上,使用Virtex5LXT50 FPGA芯片設計PCI Express接口硬件電路,實現PCI-Express數據傳輸
上傳時間: 2013-12-27
上傳用戶:wtrl