Verilog Overview n Basic Structure of a Verilog Model n Components of a Verilog Module – Ports – Data Types – Assigning Values and Numbers – Operators – Behavioral Modeling • Continuous Assignments • Procedural Blocks – Structural Modeling n Summary: Verilog Environment
標簽： Verilog Components Structure Overview
上傳時間： 2017-02-18
上傳用戶：xinyuzhiqiwuwu
The Synthetic PIC Verion 1.1 This a VHDL synthesizable model of a simple PIC 16C5x microcontroller. It is not, and is not intended as, a high fidelity circuit simulation. This package includes the following files. Note that the license agreement is stated in the main VHDL file, PICCPU.VHD and common questions are answered in the file SYNTHPIC.TXT Files: README.TXT This file.. SYNTHPIC.TXT Questions and Answers PICCPU.VHD Main processor VHDL file PICALU.VHD ALU for the PICCPU PICREGS.VHD Data memory PICROM.VHD Program memory (created by HEX2VHDL utility) PICTEST.VHD Simple test bench I used to do testing (optional) PICTEST.CMD My Viewlogic ViewSim command file (again, optional) TEST1.ASM First program I assembled and ran on it. TEST2.ASM Another test program.. TEST3.ASM Yet another.. TEST4.ASM Yet another.. TEST5.ASM Yet another.. TEST6.ASM Yet another.. HEX2VHDL.CPP Utility for converting
標簽： synthesizable microcontro Synthetic PIC
上傳時間： 2013-12-22
上傳用戶：妄想演繹師
讀者要在命令行下輸入tcc -B d:\tc\source\pport.c,來編譯 之后需要編譯server.c和clint.c
標簽： csourcepport server clint tcc
上傳時間： 2017-02-18
上傳用戶：ZJX5201314
綜合2叉樹及B+樹優點的能根據增刪改而分裂或合并的完整程序(現在以8bit(BYTE key)為關鍵字,可擴充到64bit的double為key,用戶數據包現在以float ton表示,可擴充到任意結構struct)
上傳時間： 2017-02-19
上傳用戶：498732662
采用FPGA實現色彩空間轉換R’G’B’ to Y’CbCr的VHDL和verilog源代碼,支持xilinx的各種器件.
上傳時間： 2013-12-12
上傳用戶：lps11188
鄭州遠博公司生產的單片機B型實驗板電路原理圖及配套源程序代碼，它對學習單片機C語言編程有很好的作用。
上傳時間： 2017-02-24
上傳用戶：ryb
臺達VFD-B變頻器使用說明書，介紹的簡單明了，適合有一定基礎的使用。
上傳時間： 2017-02-25
上傳用戶：維子哥哥
The Software Engineering Institute’s (SEI) Capability Maturity Model (CMM) provides a well-known benchmark of software process maturity. The CMM has become a popular vehicle for assessing the maturity of an organization’s software process in many domains. This white paper describes how the Rational Unified Process can support an organization that is trying to achieve CMM Level-2, Repeatable, and Level-3, Defined, software process maturity levels.
標簽： Engineering Capability well-known Institute
上傳時間： 2017-02-27
上傳用戶：zhichenglu
檔案資料：全球IP地址地理位置數據資料庫包包 更新日期：2005年05月12日12:51 資料容量：10.4 MB 附 註： A) IP資料經人手花上五小時整理，保證100％準確，所有論壇程式皆可相容。 B) 已修正「未知地理位置」的“未”和“末”字輸入筆誤。 C) 因IP數據從中國內地取得，故此TAIWAN地區被寫成“臺灣省”，可自行改回“中華民國”或“臺灣”。 D) 範例： 202.101.071.201|202.101.071.201|貴州省貴陽市 藍月網吧|| 202.101.071.202|202.101.071.203|貴州省貴陽市 花溪區貴州民族學院鵬飛網吧|| 202.101.071.204|202.101.071.204|貴州省貴陽市 二戈寨天知網吧||
上傳時間： 2013-12-25
上傳用戶：ddddddos
"Readers can pick up this book and become familiar with C++ in a short time. Stan has taken a very broad and complicated topic and reduced it to the essentials that budding C++ programmers need to know to write real programs. His case study is effective and provides a familiar thread throughout the book.
標簽： familiar Readers become short
上傳時間： 2014-01-19
上傳用戶：luke5347
