為解決輸油管道溫度壓力參數(shù)實(shí)時(shí)監(jiān)測(cè)的問(wèn)題，設(shè)計(jì)了以C8051F930單片機(jī)作為控制核心的超低功耗輸油管道溫度壓力遠(yuǎn)程監(jiān)測(cè)系統(tǒng)。現(xiàn)場(chǎng)儀表使用高精度電橋采集數(shù)據(jù)，通過(guò)433 MHz短距離無(wú)線通信網(wǎng)絡(luò)與遠(yuǎn)程終端RTU進(jìn)行通信，RTU通過(guò)GPRS網(wǎng)絡(luò)與PC上位機(jī)進(jìn)行遠(yuǎn)程數(shù)據(jù)傳輸，在上位機(jī)中實(shí)現(xiàn)數(shù)據(jù)存儲(chǔ)和圖形化界面顯示，從而實(shí)現(xiàn)輸油管道溫度壓力參數(shù)的實(shí)時(shí)監(jiān)測(cè)和異常報(bào)警。經(jīng)實(shí)驗(yàn)證明，該系統(tǒng)的12位數(shù)據(jù)采集精度滿足設(shè)計(jì)要求，漏碼率小于1%，正常工作時(shí)間超過(guò)5個(gè)月，能實(shí)時(shí)有效地監(jiān)測(cè)輸油管道的溫度壓力參數(shù)，節(jié)省大量人工成本，有效預(yù)防管道參數(shù)異常造成的經(jīng)濟(jì)損失和環(huán)境污染。
Abstract:
In order to solve the problems on real-time monitoring of pipeline temperature and pressure parameters， the ultra-low power remote pipeline temperature and pressure monitoring system was designed by using the single chip processor C8051F930 as the control core. The high-precision electric bridge was used in field instruments for data collection， the 433MHz short-range wireless communication network was used to make communication between field instrument and RTU， the GPRS was used by the RTU to transmit data to the PC host computer， and the data was stored and displayed in the PC host computer， so the real-time monitoring and exception alerts of pipeline temperature and pressure parameters were achieved. The experiment proves that the system of which error rate is less than 1% over five months working with the 12-bit data acquisition accuracy can effectively monitor the pipeline temperature and pressure parameters in real time， it saves a lot of labor costs and effectively prevents environmental pollution and economic losses caused by abnormal channel parameters.
為了在工業(yè)生產(chǎn)及過(guò)程控制中準(zhǔn)確測(cè)量溫度，設(shè)計(jì)了一種基于低功耗MSP430單片機(jī)的數(shù)字溫度計(jì)。整個(gè)系統(tǒng)通過(guò)單片機(jī)MSP430F1121A控制DS18B20讀取溫度，采用數(shù)碼管顯示，溫度傳感器DS18B20與單片機(jī)之間通過(guò)串口進(jìn)行數(shù)據(jù)傳輸。MSP430系列單片機(jī)具有超低功耗，且外圍的整合性高，DS18B20只需一個(gè)端口即可實(shí)現(xiàn)數(shù)據(jù)通信，連接方便。通過(guò)多次實(shí)驗(yàn)證明，該系統(tǒng)的測(cè)試結(jié)果與實(shí)際環(huán)境溫度一致，除了具有接口電路簡(jiǎn)單、測(cè)量精度高、誤差小、可靠性高等特點(diǎn)外，其低成本、低功耗的特點(diǎn)使其擁有更廣闊的應(yīng)用前景。
Abstract:
In order to obtain accurate measuring temperature in industrial production and process control， a digital thermometer based on MSP430 MCU is designed. The system uses MSP430F1121A MCU to control DS18B20， and gets the temperature data， which is displayed on the LED. The temperature sensor DS18B20 and MCU transmit data through serial communication. MSP430 series has ultra-low power and high integration， DS18B20 only needs one port to achieve data communication. Through many experimental results prove， this system is consistent with actual environment temperature. The system has characteristics of interface circuit simple， high measuring accuracy， minor error， high reliability， besides， the characteristics of low cost and low power make it having vaster application prospect.
為了在CDMA系統(tǒng)中更好地應(yīng)用QDPSK數(shù)字調(diào)制方式，在分析四相相對(duì)移相（QDPSK)信號(hào)調(diào)制解調(diào)原理的基礎(chǔ)上，設(shè)計(jì)了一種QDPSK調(diào)制解調(diào)電路，它包括串并轉(zhuǎn)換、差分編碼、四相載波產(chǎn)生和選相、相干解調(diào)、差分譯碼和并串轉(zhuǎn)換電路。在MAX+PLUSⅡ軟件平臺(tái)上，進(jìn)行了編譯和波形仿真。綜合后下載到復(fù)雜可編程邏輯器件EPM7128SLC84-15中，測(cè)試結(jié)果表明，調(diào)制電路能正確選相，解調(diào)電路輸出數(shù)據(jù)與QDPSK調(diào)制輸入數(shù)據(jù)完全一致，達(dá)到了預(yù)期的設(shè)計(jì)要求。
Abstract:
In order to realize the better application of digital modulation mode QDPSK in the CDMA system， a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase，and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.
在現(xiàn)代通信系統(tǒng)中，電話語(yǔ)音的頻帶被限制在300 Hz～4 kHz的范圍內(nèi)，帶來(lái)了語(yǔ)音可懂度和自然度的降低。為了在不增加額外成本的前提下提高語(yǔ)音的可懂度和自然度，進(jìn)行了電話語(yǔ)音頻帶擴(kuò)展的研究。提出了一種改進(jìn)的基于碼本映射的語(yǔ)音帶寬擴(kuò)展算法：在碼本映射的過(guò)程中，使用加權(quán)系數(shù)來(lái)得到映射碼本。客觀測(cè)試結(jié)果表明，用此算法得到的寬帶語(yǔ)音的譜失真度比用一般的碼本映射降低至少2%。主觀測(cè)試結(jié)果表明，用此算法得到的寬帶語(yǔ)音具有更好的可懂度和自然度。
Abstract:
In modern communication systems， the bandwidth of telephone speech is limited from 300Hz to 4 kHz， which reduces the intelligibility and naturalness of speech. Telephone speech bandwidth extension is researched to get wideband speech and to improve its intelligibility and naturalness， without increasing extra costs. This paper put forward an improved algorithm of speech bandwidth extension based on codebook mapping. In the process of codebook mapping， weighted coefficients were used to get mapping codebook. Objective tests show that spectral distortion of wideband speech obtained by this algorithm reduces at least 2%， comparing to conditional codebook mapping. Subjective tests show that the wideband speech obtained by this algorithm has better intelligibility and naturalness.
為了能夠滿足基站易于選址、優(yōu)質(zhì)快速的建站要求和易維護(hù)、低成本、高可靠的運(yùn)行要求，本文對(duì)以方艙來(lái)實(shí)現(xiàn)一體化結(jié)構(gòu)基站做出一番探討。從系統(tǒng)設(shè)計(jì)的觀點(diǎn)闡述了移動(dòng)通信高性能基站天線設(shè)計(jì)的幾個(gè)關(guān)鍵問(wèn)題，介紹了智能天線技術(shù)在基站中的應(yīng)用，并且用HFSS軟件仿真了一種新型的對(duì)稱陣子天線，該天線駐波比小于2的帶寬可以達(dá)到60%，具有良好的寬頻帶特性。
Abstract:
In order to meet the station construction requirement of easy site selection and fast base station， and meet the operational requirement of easy maintenance， low cost and high reliability， this paper discussed the unified architecture base station using shelter. Several key problems of high performance mobile communication base station antenna were illustrated from the view of system design， the application of smart antenna in base station was also introduced. And a novel dipole antenna was simulated by using HFSS， the VSWR of the antenna is less than 2， and the bandwidth was reach to 60%. So it has good broadband properties.
為了在CDMA系統(tǒng)中更好地應(yīng)用QDPSK數(shù)字調(diào)制方式，在分析四相相對(duì)移相（QDPSK)信號(hào)調(diào)制解調(diào)原理的基礎(chǔ)上，設(shè)計(jì)了一種QDPSK調(diào)制解調(diào)電路，它包括串并轉(zhuǎn)換、差分編碼、四相載波產(chǎn)生和選相、相干解調(diào)、差分譯碼和并串轉(zhuǎn)換電路。在MAX+PLUSⅡ軟件平臺(tái)上，進(jìn)行了編譯和波形仿真。綜合后下載到復(fù)雜可編程邏輯器件EPM7128SLC84-15中，測(cè)試結(jié)果表明，調(diào)制電路能正確選相，解調(diào)電路輸出數(shù)據(jù)與QDPSK調(diào)制輸入數(shù)據(jù)完全一致，達(dá)到了預(yù)期的設(shè)計(jì)要求。
Abstract:
In order to realize the better application of digital modulation mode QDPSK in the CDMA system， a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase，and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.
本文利用Verilog HDL 語(yǔ)言自頂向下的設(shè)計(jì)方法設(shè)計(jì)多功能數(shù)字鐘，突出了其作為硬件描述語(yǔ)言的良好的可讀性、可移植性和易理解等優(yōu)點(diǎn)，并通過(guò)Altera QuartusⅡ 4.1 和ModelSim SE 6.0 完成綜合、仿真。此程序通過(guò)下載到FPGA 芯片后，可應(yīng)用于實(shí)際的數(shù)字鐘顯示中。
關(guān)鍵詞：Verilog HDL；硬件描述語(yǔ)言；FPGA
Abstract: In this paper, the process of designing multifunctional digital clock by the Verilog HDL top-down design method is presented, which has shown the readability, portability and easily understanding of Verilog HDL as a hard description language. Circuit synthesis and simulation are performed by Altera QuartusⅡ 4.1 and ModelSim SE 6.0. The program can be used in the truly digital clock display by downloading to the FPGA chip.
Keywords: Verilog HDL；hardware description language；FPGA
為了提高直接轉(zhuǎn)矩控制（DTC）系統(tǒng)定子磁鏈估計(jì)精度，降低電流、電壓測(cè)量的隨機(jī)誤差，提出了一種基于擴(kuò)展卡爾曼濾波（EKF）實(shí)現(xiàn)異步電機(jī)轉(zhuǎn)子位置和速度估計(jì)的方法。擴(kuò)展卡爾曼濾波器是建立在基于旋轉(zhuǎn)坐標(biāo)系下由定子電流、電壓、轉(zhuǎn)子轉(zhuǎn)速和其它電機(jī)參量所構(gòu)成的電機(jī)模型上，將定子電流、定子磁鏈、轉(zhuǎn)速和轉(zhuǎn)子角位置作為狀態(tài)變量，定子電壓為輸入變量，定子電流為輸出變量，通過(guò)對(duì)磁鏈和轉(zhuǎn)速的閉環(huán)控制提高定子磁鏈的估計(jì)精度，實(shí)現(xiàn)了異步電機(jī)的無(wú)速度傳感器直接轉(zhuǎn)矩控制策略，仿真結(jié)果驗(yàn)證了該方法的可行性,提高了直接轉(zhuǎn)矩的控制性能。
Abstract:
In order to improve the Direct Torque Control（DTC） system of stator flux estimation accuracy and reduce the current， voltage measurement of random error， a novel method to estimate the speed and rotor position of asynchronous motor based on extended Kalman filter was introduced. EKF was based on d-p axis motor and other motor parameters （state vector: stator current， stator flux linkage， rotor angular speed and position； input: stator voltage； output: staror current). EKF was designed for stator flux and rotor speed estimation in close-loop control. It can improve the estimated accuracy of stator flux. It is possible to estimate the speed and rotor position and implement asynchronous motor drives without position and speed sensors. The simulation results show it is efficient and improves the control performance.
Abstract—In the future communication applications, users
may obtain their messages that have different importance levels
distributively from several available sources, such as distributed
storage or even devices belonging to other users. This
scenario is the best modeled by the multilevel diversity coding
systems (MDCS). To achieve perfect (information-theoretic)
secrecy against wiretap channels, this paper investigates the
fundamental limits on the secure rate region of the asymmetric
MDCS (AMDCS), which include the symmetric case as a special
case. Threshold perfect secrecy is added to the AMDCS model.
The eavesdropper may have access to any one but not more than
one subset of the channels but know nothing about the sources,
as long as the size of the subset is not above the security level.
The question of whether superposition (source separation) coding
is optimal for such an AMDCS with threshold perfect secrecy
is answered. A class of secure AMDCS (S-AMDCS) with an
arbitrary number of encoders is solved, and it is shown that linear
codes are optimal for this class of instances. However, in contrast
with the secure symmetric MDCS, superposition is shown to
be not optimal for S-AMDCS in general. In addition, necessary
conditions on the existence of a secrecy key are determined as a
design guideline.
